High
−
level Instructions
3
−
65
Outline
Adds two 32-bit data items and stores the result in the specified area.
For the FP0R/FP
Σ
/FP
−
X/FP0/FP
−
e, the P type high
−
level instruction
“P23 (PD+)” is not available.
Program example
Ladder Diagram
Boolean
Ladder Diagram
Address
Instruction
10
F23 D+ , DT 10 , DT 20 , DT 30
S1
D
Trigger
S2
R0
10
11
ST
R
0
F 23
(D+)
DT
10
DT
20
DT
30
S1
32-bit equivalent constant or lower 16-bit area of 32-bit data (for augend)
S2
32-bit equivalent constant or lower 16-bit area of 32-bit data (for addend)
D
Lower 16-bit area of 32-bit data (for result)
Operands
Operand
Relay
Timer/Counter
Register
Index
register
Constant
Index
Operand
WX WY WR WL
(
*
1)
SV
EV
DT LD
(
*
1)
FL
(
*
2)
IX
(
*
3)
IY
(
*
4)
K
H
Index
modifier
S1
A
A
A
A
A
A
A
A
A
A
N/A
A
A
A
S2
A
A
A
A
A
A
A
A
A
A
N/A
A
A
A
D
N/A
A
A
A
A
A
A
A
A
A
N/A
N/A N/A
A
(
*
1) This cannot be used with the FP0 and FP
−
e.
(
*
2) This cannot be used with the FP0, FP
−
e, FP0R, FP
Σ,
FP
−
X.
(
*
3) With the FP0R, FP
Σ
, FP
−
X, FP2, FP2SH, and FP10SH, this is I0 to IC.
(
*
4) With the FP0R, FP
Σ
, FP
−
X, FP2, FP2SH, and FP10SH, this is ID.
F23
P23
(D+)
(PD+)
32-bit data addition
[(S1+1, S1) + (S2+1, S2)
→
(D+1, D)]
A: Available
N/A: Not Available
Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: [email protected]
Summary of Contents for FP-X
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