Interrupts 119
Interrupt status register (HOSTINTSTAT) 146
Pin functions 119
HOSTINTENAB 147
HOSTINTFLAG 148
HOSTINTSTAT 146
HOSTSTATUS 144
HOSTVERSION 145
I
Interlaced scan 157
Interrupts 119
ITU-R656 154
Clock phase 155
Timing reference 155
L
LBus-I/F 123
Addressing modes 124
DMA request 132
eeBstCfg command 129
eeLong command 128
eeNOP command 130
eeShort command 127
eeShortOffs command 126
Protocol 125
Signals 123
Limiter 229, 232, 244
Line counter (Video Input) 159
Long addressing mode 124
Loop-back mode 95
M
Main system clock HCLK 90
MemC_Base 290
MEMCSALIASn 326
Memory and register map 83
Ravin-L 83
Ravin-M 85
Memory Controller 311
Address adjustment 311
Address alias 308
Addressing example 310
address setup time 327
Auto-refresh 297
Base address 308
Base address (MemC_Base) 290
CAS latency 317
Chip select address mask register
(MEMSMSKRn) 324
Chip select alias address registers
(MEMCSALIASn) 326
Chip select base address registers
(MEMSCSLRn) 323
Chip select configuration 307
Control Registers 314
data hold time (SRAM/flash) 327
MEMCSALIASn 308
Memory Size 308
MEMSCSLRn 308
MEMSMSKRn 308
MEMSREFR 297
Pin functions 290
Power-down 312
RAS timing 317
read cycle time 327
SDRAM configuration register (MEMSCONR)
315
SDRAM control register (MEMSCTRL) 320
SDRAM initialization 295
SDRAM refresh interval register (MEMSREFR)
322
SDRAM timing register 0 (MEMSTMG0R) 317
SDRAM timing register 1 (MEMSTMG1R) 319
Self-refresh 300
Static memory control register (MEMSMCTLR)
330
Static memory timing 302
Static memory timing registers
(MEMSMTMGRk) 327
MEMSCONR 315
MEMSCSLRn 323
MEMSCTRL 320
MEMSCTRL.FSREFA 300
MEMSCTRL.FSREFB 300
MEMSCTRL.PWDM 312
MEMSCTRL.SREF 300
MEMSCTRL.SREFSTAT 300
MEMSMCTLR 330
MEMSMSKRn 324
MEMSMSKRn.MEMTYPE 302
MEMSMTMGRk 327
MEMSREFR 322
MEMSTMG0R 317
Preliminary User's Manual S19203EE1V3UM00
339
Summary of Contents for uPD72257
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