Register function
Name
Address
Index
Limiter 5 y-axis increment
DRWL5YADD
<DrwE_Base> + 50
H
20
Limiter 6 y-axis increment
DRWL6YADD
<DrwE_Base> + 54
H
21
Limiter 1 band width
parameter
DRWL1BAND
<DrwE_Base> + 58
H
22
Limiter 2 band width
parameter
DRWL2BAND
<DrwE_Base> + 5C
H
23
Texture registers:
Texture base address
DRWTEXORIGIN
<DrwE_Base> + BC
H
47
Texels per texture line
DRWTEXPITCH
<DrwE_Base> + B4
H
45
Texture size or texture
address mask
DRWTEXMASK
<DrwE_Base> + B8
H
46
U limiter start value
DRWLUSTART
<DrwE_Base> + 90
H
36
U limiter x-axis increment
DRWLUXADD
<DrwE_Base> + 94
H
37
U limiter y-axis increment
DRWLUYADD
<DrwE_Base> + 98
H
38
V limiter start value integer
part
DRWLVSTARTI
<DrwE_Base> + 9C
H
39
V limiter start value fractional
part
DRWLVSTARTF
<DrwE_Base> + A0
H
40
V limiter x-axis increment
integer part
DRWLVXADDI
<DrwE_Base> + A4
H
41
V limiter y-axis increment
integer part
DRWLVYADDI
<DrwE_Base> + A8
H
42
V limiter increment fractional
parts
DRWLVYXADDF
<DrwE_Base> + AC
H
43
Colour lookup table for the
indexed texture format
DRWTEXCLUT
<DrwE_Base> + D8
H
n.a.
b
Miscellaneous registers:
Bounding box dimension
DRWSIZE
<DrwE_Base> + 78
H
30
Framebuffer pitch and
spanstore delay
DRWPITCH
<DrwE_Base> + 7C
H
31
Address of the first pixel in
framebuffer
DRWORIGIN
<DrwE_Base> + 80
H
32
Display list start address
DRWDLISTSTART
<DrwE_Base> + C8
H
50
Performance counters
control register
DRWPERFTRIGGER <DrwE_Base> + D4
H
53
Performance counter 1
DRWPERFCOUNT1
<DrwE_Base> + CC
H
51
Performance counter 2
DRWPERFCOUNT2
<DrwE_Base> + D0
H
52
a
These registers are read-only and can not be accesses in display list mode and
therefore have no index.
b
The colour look-up table can not be written via display list commands and
therefore has no index.
<DrwE_Base>
address
The <DrwE_Base> address of the registers is defined in the first section of this
chapter under the key word "Register base addresses".
Chapter 8
Drawing Engine
254
Preliminary User's Manual S19203EE1V3UM00
Summary of Contents for uPD72257
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