FIFO
The RGB(565) data is intermediately stored in an 32-bit x 32-bit FIFO, thus holding
the data of 64 pixels, which are transfered to the framebuffer via the AHB as a
single burst.
Interrupts
The Video Input module generates three interrupts: VI0FFOINT (FIFO overflow),
VI0AHEINT (AHB error) and VI0SCLINT (scanline).
Registers
All control registers of the Video Input module are accessible via the APB-I/F.
6.2 Data Format and Synchronization
The Video Input module accepts two different video data formats.
•
RGB data (VInCONTROL.RGBEN = 1)
-
supported formats are
- RGB(666) (VInCONTROL.RGBSEL = 1)
- RGB(565) (VInCONTROL.RGBSEL = 0)
-
frame/line synchronization is achieved by a composite
synchronization CSYNC signal input to VInSYNC1 or separate
signals HSYNC/VSYNC to VInSYNC1 and VInSYNC2
-
the data is input via VInR[5:0], VInG[5:0], VInB[5:0]
•
YUV(4:2:2) (VInCONTROL.RGBEN = 0)
-
ITU-R656 coform Video Input data format
-
supported orders are
- Y0:U:Y1:V (VInCONTROL.YUVSEL = 1)
- U:Y0:V:Y1 (VInCONTROL.YUVSEL = 0)
-
frame/line synchronization is achieved by the ITU-R656
embedded synchronization bytes
-
the data is input via ITU[7:0]
The table below summarizes the VInCONTROL register settings for setting up a
dedicated Video Input mode.
Table 6-2 Video Input data formats
Data format
VInCONTROL.
RGBEN RGBSEL YUVSEL
SYNCSEL[1:0]
ITU-R656
YUV(4:2:2)
Y0:U:Y1:V
0
–
0
- 00
B
: embedded sync
U:Y0:V:Y1
1
RGB
(565)
1
0
–
- 01
B
: composite sync
- 10
B
: separate sync
(666)
1
6.2.1 ITU-R656 data input
The Video Input module is set up to receive YUV(4:2:2) ITU-R656 data by
VInCONTROL.RGBEN = 0.
Further the order of the luminance (Y) and chrominance (U, V) samples can be
chosen:
•
VInCONTROL.YUVSEL = 0: order Y0:U:Y1:V
•
VInCONTROL.YUVSEL = 1: order U:Y0:V:Y1
Chapter 6
Video Input (Ravin-M only)
154
Preliminary User's Manual S19203EE1V3UM00
Summary of Contents for uPD72257
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