NEC uPD72257, Preliminary User'S Manual

Page: 334 / 343

Address Register name Shortcut
Access width in
bit
8 16 32
0000 1E20H Video Input status VI0STATUS – – R
0000 1E24H Active scanline VI0ACTSCANLINE – – R
0000 1E28H Scanline interrupt control VI0SCANLINEINT – – R/W
0000 1E2CH VCSYNC separator control VI0SYNCDECODE – – R/W
0000 1E30H Scanlines offset VI0STRIDEX – – R/W
0000 1E34H YUV adjustment control VI0ADJUSTLEVEL – – R/W
0000 1E50H Video Input macro version VI0REVISION – – R
0000 2000H VO0 Horizontal axis panel control VO0LCDTIMING0 – – R/W
0000 2004H VO0 Vertical axis panel control VO0LCDTIMING1 – – R/W
0000 2008H VO0 Clock and signal polarity control VO0LCDTIMING2 – – R/W
0000 2010H VO0 Framebuffer base address VO0LCDUPBASE – – R/W
0000 2018H VO0 Control VO0LCDCONTROL – – R/W
0000 201CH VO0 Interrupt mask set/clear VO0LCDIMSC – – R/W
0000 2020H VO0 Raw interrupt status VO0LCDRIS – – R
0000 2024H VO0 Masked interrupt status VO0LCDMIS – – R
0000 2028H VO0 Interrupt clear VO0LCDICR – – R
0000 202CH VO0 Current address VO0LCDUPCURR – – R
0000 2200H -
0000 23FCH
VO0 Colour palette registers VO0LCDPALETTE – – R/W
0000 3000H SDRAM configuration MEMSCONR – – R/W
0000 3004H SDRAM timing 0 MEMSTMG0R – – R/W
0000 3008H SDRAM timing 1 MEMSTMG1R – – R/W
0000 300CH SDRAM control MEMSCTLR – – R/W
0000 3010H SDRAM refresh MEMSREFR – – R/W
0000 3014H Chip select base address 0 MEMSCSLR0 – – R/W
0000 3018H Chip select base address 1 MEMSCSLR1 – – R/W
0000 3054H Chip select address mask 0 MEMSMSKR0 – – R/W
0000 3058H Chip select address mask 1 MEMSMSKR1 – – R/W
0000 3074H Chip select alias address 0 MEMCSALIAS0 – – R/W
0000 3078H Chip select alias address 1 MEMCSALIAS1 – – R/W
0000 3094H Static memory timing 0 MEMSMTMGR0 – – R/W
0000 3098H Static memory timing 1 MEMSMTMGR1 – – R/W
0000 309CH Static memory timing 2 MEMSMTMGR2 – – R/W
0000 30A4H Static memory control register MEMSMCTRL – – R/W
0000 4000H VO1 Horizontal axis panel control VO1LCDTIMING0 – – R/W
0000 4004H VO1 Vertical axis panel control VO1LCDTIMING1 – – R/W
0000 4008H VO1 Clock and signal polarity control VO1LCDTIMING2 – – R/W
0000 4010H VO1 Framebuffer base address VO1LCDUPBASE – – R/W
0000 4018H VO1 Control VO1LCDCONTROL – – R/W
0000 401CH VO1 Interrupt mask set/clear VO1LCDIMSC – – R/W
Chapter 10 Register List
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Preliminary User's Manual S19203EE1V3UM00