Address range
Bus
Target
0000 0900
H
to 0000 1CFF
H
Reserved
0000 1D00
H
to 0000 1DFF
H
Drawing Engine registers
0000 1E00
H
to 0000 1FFF
H
Reserved
0000 2000
H
to 0000 2FFF
H
AHB
Video Output 0
0000 3000
H
to 0000 3FFF
H
Memory Controller registers
0000 4000
H
to 0000 4FFF
H
Reserved
0000 5000
H
to 07FF FFFF
H
External memory bus
0800 0000
H
to FFFF FFFF
H
Reserved
Table 3-3 Ravin-L AHB master priorities
Priority
AHB master
1 (highest)
Host-I/F
2
Video Output 0 (framebuffer access)
3 (lowest)
Drawing Engine (framebuffer access)
Chapter 3
Memory and Register Map
84
Preliminary User's Manual S19203EE1V3UM00
Summary of Contents for uPD72257
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