NEC uPD72257, Preliminary User'S Manual

Page: 333 / 343

Address Register name Shortcut
Access width in
bit
8 16 32
0000 1D40H Limiter 1 y-axis increment DRWL1YADD – – W
0000 1D44H Limiter 2 y-axis increment DRWL2YADD – – W
0000 1D48H Limiter 3 y-axis increment DRWL3YADD – – W
0000 1D4CH Limiter 4 y-axis increment DRWL4YADD – – W
0000 1D50H Limiter 5 y-axis increment DRWL5YADD – – W
0000 1D54H Limiter 6 y-axis increment DRWL6YADD – – W
0000 1D58H Limiter 1 band width parameter DRWL1BAND – – W
0000 1D5CH Limiter 2 band width parameter DRWL2BAND – – W
0000 1D64H Base color DRWCOLOR1 – – W
0000 1D68H Secondary color DRWCOLOR2 – – W
0000 1D74H Pattern register DRWPATTERN – – W
0000 1D78H Bounding box dimension DRWSIZE – – W
0000 1D7CH Framebuffer pitch and spanstore delay DRWPITCH – – W
0000 1D80H Framebuffer base address DRWORIGIN – – W
0000 1D90H U Limiter start value DRWLUSTART – – W
0000 1D94H U Limiter x-axis increment DRWLUXADD – – W
0000 1D98H U Limiter y-axis increment DRWLUYADD – – W
0000 1D9CH V Limiter start value integer part DRWLVSTARTI – – W
0000 1DA0H V Limiter start value fractional part DRWLVSTARTF – – W
0000 1DA4H V Limiter x-axis increment integer part DRWLVXADDI – – W
0000 1DA8H V Limiter y-axis increment integer part DRWLVYADDI – – W
0000 1DACH V Limiter increment fractional parts DRWLVYXADDF – – W
0000 1DB4H Texels per texture line DRWTEXPITCH – – W
0000 1DB8H Texture size or texture address mask DRWTEXMASK – – W
0000 1DBCH Texture base address DRWTEXORIGIN – – W
0000 1DC0H Interrupt control DRWIRQCTL – – W
0000 1DC4H Cache control DRWCACHECTL – – W
0000 1DC8H Displaylist start address DRWDLISTSTART – – W
0000 1DCCH Performance counter 1 DRWPERFCOUNT1 – – R/W
0000 1DD0H Performance counter 2 DRWPERFCOUNT2 – – R/W
0000 1DD4H Performance counters control register DRWPERFTRIGGER – – W
0000 1DD8H Colour lookup table for the indexed texture format DRWTEXCLUT – – W
0000 1E00H First field framebuffer memory start address VI0STARTADDR1 – – R/W
0000 1E04H Second field framebuffer memory start address VI0STARTADDR2 – – R/W
0000 1E08H First pixel VI0STARTX – – R/W
0000 1E0CH First line VI0STARTY – – R/W
0000 1E10H Scaled pixels/line VI0SCALEDWIDTH – – R/W
0000 1E14H Scaled lines/field VI0SCALEDHEIGHT – – R/W
0000 1E18H Video Input control VI0CONTROL – – R/W
0000 1E1CH Scaling factors VI0SCALING – – R/W
Register List Chapter 10
Preliminary User's Manual S19203EE1V3UM00
333