Therefore an alias address has to be defined in the chip select alias register
MEMCSALIASn. MEMCSALIASn has to be set up in the same way as the chip
select base address register MEMSCSLRn, i.e. its upper bits
MEMCSALIASn.CSAADDR[31:i] are compared with the internal memory address
IMEMADD[31:i]. If both match, MCSn is activated.
Consequently MCSn is activated, if either MEMSCSLRn.CSBADDR[31:i] or
MEMCSALIASn.CSAADDR[31:i] match with the [31:i] bits of the internal memory
address IMEMADD[31:i].
Below figure illustrates the generation of the MCSn signal.
30
31
[31:i]
[31:i]
[31:i]
0
0
0
0
0
1
. . .
. . .
1
1
i i-1
mask
30
31
0
. . .
. . .
i i-1
MEMSCSLRn
30
31
base address match
alias address match
0
0
0
1
. . .
. . .
1
1
i i-1
mask
compare
30
31
and
and
0
. . .
. . .
i i-1
IMEMADD[31:0]
compare
and
30
31
0
0
0
0
0
1
. . .
. . .
1
1
i i-1
mask
30
31
0
. . .
. . .
i i-1
MEMCSALIASn
MCSn
nor
Figure 9-11 Address masking and alias
Note
If address aliasing shall not be used, set the chip select alias register to the same
value as the chip select base address register, i.e. MEMCSALIASn =
MEMSCSLRn.
External Memory Interface Controller
Chapter 9
Preliminary User's Manual S19203EE1V3UM00
309
Summary of Contents for uPD72257
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