IEEE-488 Reference
3-126
Effects of negative transitions on the Arm Event Register:
Negative transition effect on
Arm event
Arm Event Register
Sequence 1
Sets B1 when leaving an arm layer.
Effects of negative transitions on the Sequence Event Register:
Negative transition effect on
Sequence event
Sequence Event Register
Layer 1
Sets B1 when leaving arm layer 1.
Layer 2
Sets B2 when leaving arm layer 2.
3.21.5
:CONDition?
:STATus:MEASurement:CONDition?
Read Measurement Condition Register :
STATus:QUEStionable:CONDition?
Read Questionable Condition Register
:STATus:OPERation:CONDition?
Read Operation Condition Register
:STATus:OPERation:TRIGger:CONDition?
Read Trigger Condition Register
:STATus:OPERation:ARM:CONDition?
Read Arm Condition Register
:STATus:OPERation:ARM:SEQuence:CONDition?
Read Sequence Condition Register
Description
These query commands are used to read the contents of the condition registers. Each set of event
registers (except the Standard Event register set) has a condition register. A condition register is
similar to its corresponding event register, except that it is a real- time register that constantly
updates to reflect the current operating status of the instrument.
See [:EVENt] for register bit descriptions. Note from the status structure (paragraph 3.8) that
the condition registers precede the transition filters. Thus, only the PTR descriptions apply to
the condition registers.
After sending one of these commands and addressing the Model 6517A to talk, a decimal value
is sent to the computer. The binary equivalent of this decimal value indicates which bits in the
register are set.
For example, if sending :stat:meas:cond? returns a decimal value of 512 (binary
0000001000000000), bit B9 of the Measurement Condition Register is set indicating that the
trace buffer is full.
3.21.6
:PRESet
:STATus:PRESet
Return registers to default conditions
Description
When this command is sent, the SCPI event registers are affected as follows:
2. All bits of the positive transition filter registers are set to one (1).
3. All bits of the negative transition filter registers are cleared to zero (0).
4. All bits of the following registers are cleared to zero (0):
E. Operation Event Enable Register.
F. Questionable Event Enable Register.
G. Measurement Event Enable Register.
5. All bits of the following registers are set to one (1):
A. Trigger Event Enable Register.
B. Arm Event Enable Register.
C. Sequence Event Enable Register.
Note: Registers not included in the above list are not affected by this command.
