IEEE-488 Reference
3-29
3.11.3 *ESR? — event status register query
Read the Standard Event Status Register and clear it.
Description
This command is used to acquire the value (in decimal) of the Standard Event Status Register
(see Figure 3-16). The binary equivalent of the returned decimal value determines which bits in
the register are set. This register is cleared on power-up or when *CLS is sent.
A set bit in this register indicates that a particular event has occurred. For example, for an ac-
quired decimal value of 48, the binary equivalent is 00110000. For this binary value, bits B4 and
B5 of the Standard Event Status Register are set. These set bits indicate that a device-dependent
error and command error have occurred.
B7
B6
B5
B4
B3
B2
B1
B0
0/1
0/1
0/1
Bit Position
Event
Decimal Weighting
Value
Value : 1 = Enable Standard Event
0 = Disable (Mask) Standard Event
PON URQ CME
DDE
EXE
QYE
OPC
0/1
0/1
0/1
0/1
(2 )
7
(2 )
6
(2 )
5
(2 )
4
(2 )
3
(2 )
2
(2 )
0
64
32
1
128
16
8
4
Note : Bits B8 through B15 are not shown since they are not used.
Events : PON = Power On
URQ = User Request
CME = Command Error
EXE = Execution Error
DDE = Device-dependent Error
QYE = Query Error
OPC = Operation Complete
Figure 3-15
Standard Event Enable Register
Figure 3-16
Standard Event Status Register
B7
B6
B5
B4
B3
B2
B1
B0
0/1
0/1
0/1
Bit Position
Event
Decimal Weighting
Value
Value : 1 = Event Bit Set
0 = Event Bit Cleared
Events : PON = Power On
URQ = User Request
CME = Command Error
EXE = Execution Error
DDE = Device-dependent Error
QYE = Query Error
OPC = Operation Complete
PON URQ CME EXE
DDE QYE
OPC
0/1
0/1
0/1
0/1
(2 )
7
(2 )
6
(2 )
5
(2 )
4
(2 )
3
(2 )
2
(2 )
0
64
32
1
128
16
8
4
Note : Bits B8 through B15 are not shown since they are not used.
