HP 64783A, User Manual

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To specify whether the clock speed of the
emulation bus is greater than 25 MHz
•
Choose "Yes" or "No" for the "Bus Clock Speed >25MHz" configuration option.
Choosing "Yes" causes the emulator to add one wait state to each synchronous and
burst memory access.
Choosing "No" allows all synchronous and burst accesses to be completed at full
processor speed with no wait states.
When the external bus clock (BCLK) is operating at a frequency above 25 MHz,
this question must be answered "Yes".
When operating above 25 MHz, the target system is responsible for adding a wait
state to its accesses. The emulator will not attempt to add a wait state to target
accessses, other than to ignore cycle terminations until a wait state has passed. The
target system is responsible for making sure cycle terminations and data are valid
after the wait state.
The 4-Mbyte memory modules are not as fast as the 256-Kbyte and 1-Mbyte
memory modules. The emulator always adds one wait state to accessess to
emulation memory when it detects the presence of any 4-Mbyte memory modules
on the emulation probe.
Chapter 8: Configuring the Emulator
Configuring the Emulator General Items Screen
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