Self-Test Error Messages,
Continued
Table A–21
(Continued) Synch Communications Self-Test
Sequence Numbers
Test Number
Decimal
Hexadecimal Routine
Description
15
0F
imp_loc_
init
Local scratch RAM SCR
initialization
16
10
imp_idb_
init
Interrupt data block
initialization
17
11
imp_pcb_
init
Process control block
initialization
18
12
imp_ic_init
Interrupt controller
initialization
19
13
imp_cable_
code
Read cable code
20
14
imp_dma_
test
IDMA Transfers test
21
15
imp_rings
Initialize rings
22
16
imp_s1_
inte
SCC1 ISR Enable
23
17
imp_s2_
inte
SCC2 ISR Enable
24
18
imp_s3_
inte
SCC3 ISR Enable
25
19
imp_it1_
test
Timer 1 test
26
1A
imp_it2_
test
Timer 2 test
27
1B
imp_imode
Initialize mode
28
1C
imp_reset
Initialize CP
29
1D
imp_ilb_
test
SCC Internal loop
Continued on next page
A–66