2-16
2.7
Console Power-Up Tests
Once the SRM console is loaded, it tests of each IOD further. Table 2-5
describes the IOD power-up tests, and Table 2-6 describes the PCI power-up
tests.
Table 2-5 IOD Tests
Test #
Test Name
Description
1
IOD CSR Access test
Read and write all CSRs in each IOD.
2
Loopback test
Dense space writes to the IOD’s PCI dense
space to check the integrity of ECC lines.
3
ECC test
Loopback tests similar to test 2 but with a
varying pattern to create an ECC of 0s.
Single- and double-bit errors are checked.
4
Parity Error and Fill
Error tests
Parity errors are forced on the address and
data lines on system bus and PCI buses. A
fill error transaction is forced on the system
bus.
5
Translation Error test
A loopback test using scatter/gather address
translation logic on each IOD.
6
Write Pending test
Runs test 2 with the write-pending bit set
and clear in the CAP chip control register.
7
PCI Loopback test
Loops data through each PCI on each IOD,
testing the mask field of the system bus.
8
PCI Peer-to-Peer
Byte Mask test
Tests that devices on the same PCI and on
different PCIs can communicate.
9
1
Page Table Entry test
1 (CAP chip)
Using scatter/gather translation and
addressing tests every PTE .
10
1
Page Table Entry test
2 (CAP chip)
Tests random PTEs forcing use of all
interesting tag and page registers.
1
Not run on power-up. These tests take approximately 30 seconds and are run in user mode.
