Error Logs 4-23
Check ALL Transactions for Errors
Use MC_BMSK for 16 Byte Align Blk Mem Wrt
Wrt PEND_NUM Threshold: 8.
RD_TYPE Memory Prefetch Algorithm: Short
RL_TYPE Mem Rd Line Prefetch Type: Medium
RM_TYPE Mem Rd Multiple Cmd Type: Long
ARB_MODE Arbitration: MC-PCI Priority Mode
Mem Host Address Ext Reg x00000000 HAE Sparse Mem Adr<31:27> x00000000
IO Host Adr Ext Register x00000000 PCI Upper Adr Bits<31:25> x00000000
Interrupt Ctrl Register x00000003 Write Device Interrupt Info
Struct:Enabled
Interrupt Request x00800000 Interrupts asserted x00000000
Hard Error
Interrupt Mask0 Register x00C50010
Interrupt Mask1 Register x00000000
MC Error Info Register 0 x07FBF080
MC Bus Trans Addr<31:4>: 7FBF080
MC Error Info Register 1 x801E8800 MC bus trans addr <39:32> x00000000
¤
MC Command is Read0-Mem
£
Device ID 2 x00000002
¢
MC bus error assoc w read/dirty
¥
MC error info valid
CAP Error Register xE0000000 Uncorrectable ECC err det by MDPA
Uncorrectable ECC err det by MDPB
MC error info latched
¡
Sys Environmental Regs x00000000
PCI Bus Trans Error Adr x00000000
MDPA Status Register xC0000000 MDPA Status Register Data Not Valid
MDPA Error Syndrome Reg x00080089 MDPA Syndrome Register Data Not
Valid
MDPB Status Register x80000000 MDPB Status Register Data Not Valid
MDPB Error Syndrome Reg x000D00D1 MDPB Syndrome Register Data Not
Valid
** IOD SUBPACKET -> ** IOD 1 Register Subpacket
WHOAMI x000000BA Module Revision 0.
VCTY ASIC Rev = 0
Bcache Size = 2MB
MID 2.
GID 7.
Base Address of Bridge x000000FBE0000000
Dev Type & Rev Register x06008021 CAP Chip Revision
x00000001
Host to PCI Revision x00000003
I/O Backplane Revision x00000003
PCI-EISA Bus Bridge Present on PCI
Device Class: Host bus to PCI Bridg
MC-PCI Command Register x06480FF1 Module SelfTest Passed LED on
Delayed PCI Bus Reads Protocol: Enabled
Bridge to PCI Transactions: Enabled
Bridge REQUESTS 64 Bit Data Transactions
Bridge ACCEPTS 64 Bit Data Transactions
PCI Address Parity Check: Enabled
MC Bus CMD/Addr Parity Check: Enabled
MC Bus NXM Check: Enabled
Check ALL Transactions for Errors
Use MC_BMSK for 16 Byte Align Blk Mem Wrt
Wrt PEND_NUM Threshold: 8.
RD_TYPE Memory Prefetch Algorithm: Short
RL_TYPE Mem Rd Line Prefetch Type: Medium
RM_TYPE Mem Rd Multiple Cmd Type: Long
ARB_MODE Arbitration: MC-PCI Priority Mode
