5-4
Service Manual PRELIMINARY
Table 5-1 External Interface Status Register
Name
Bits
Type
Description
COR_ECC_ERR <31>
R
Correctable ECC Error. Indicates that
fill data received from outside the CPU
contained a correctable ECC error.
EI_ES
<30>
R
External Interface Error Source. When
set, indicates that the error source is fill
data from main memory or a system
address/command parity error. When
clear, the error source is fill data from the
B-cache.
This bit is only meaningful when
<COR_ECC_ERR>, <UNC_ECC_ERR>,
or <EI_PAR_ERR> is set in this register.
This bit is not defined for a B-cache tag
error (BC_TPERR) or a B-cache tag
control parity error (BC_TC_ERR).
BC_TC_PERR
<29>
R
B-Cache Tag Control Parity Error.
Indicates that a B-cache read transaction
encountered bad parity in the tag control
RAM.
BC_TPERR
<28>
R
B-Cache Tag Address Parity Error.
Indicates that a B-cache read transaction
encountered bad parity in the tag address
RAM.
CHIP_ID
<27:24>
R
Chip Identification. Read as “4.” Future
update revisions to the chip will return new
unique values.
<23:0>
All ones.
