GR716-DS-UM, May 2019, Version 1.29
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GR716
Figure 5.
LEON3FT microcontroller clock distribution scheme and control register.
4.1
PLL Configuration and Status
The PLL is designed to mitigate radiation effects and to always output 400 MHz. In order to lock and
generate a 400 MHz output clock the PLL needs to be programmed with the input clocks frequency.
The input clock frequency is set via PLL control and status registers, see section 10.
When the GR716 Microcontroller is configured to be controlled via remote access the PLL is config-
ured automatically after reset by the hardware. The setup used is determined by configuration boot-
straps specified in chapter 3.1. The input frequency needs to be known by the hardware in order to
properly setup and synchronize the remote access link.
4.2
Clock Source and divisor
The system clock, SpaceWire clock, PWM and GR1553B clock can be generated internally from
internal or external sources, see figure 5 and section 10. Clock source and divisor is selected via con-
figuration registers described in section 10.
The clock source and divisor needs to be chosen carefully depended upon the application require-
ments for clock frequency, clock jitter and clock duty cycle.
Clock
Divider
Sel
SYSREF.SEL
SYSREF.DUTY
SYSREF.DIV
System Clock
Dividor
ACFG.AC
DCFG.DS
SYSREF.SEL
SYSREF.DUTY
SYSREF.DIV
PWMxREF.SEL
PWMxREF.DUTY
PWMxREF.DIV
PWMxREF.200M
PLL
Sel
SYSSEL.S
Clock
Divider
Sel
SPWREF.SEL
SPWREF.DUTY
SPWREF.DIV
SpaceWire Clock
Dividor
On-chip PLL
Clock
Divider
Sel
PWMx Clock
Dividor
External
System
Clock
External
SpaceWire
Clock
PLLREF.SEL
PLL.CFG
PLL.PD
Sel
SYS.CFG.GPx
Clock
Divider
Sel
MIL-1553B Clock
Dividor
External
MIL/1553B
Clock
Clock Div
Clock Div
External
SPI4S
Clock
Internal
System
Clock
On-chip
ADC clock
On-chip
DAC clock
Internal
SpcaeWire
Clock
Internal
MIL-1553B
Clock
Internal
PWMx
Clock
Internal
SPI4S Clock
Sel
SYS.CFG.GPx
External
PacketWire
Clock
SYS_CLK
SPISL_SCK, GPIO[53]
GPIO[10]
GPIO[47]
GPIO[61]
GPIO[1]
GPIO[26]
GPIO[38]
GPIO[53]
GPIO[17], GPIO[18]
External
PWM
Clock
Internal
PacketWire
Clock
Sel