GR716-DS-UM, May 2019, Version 1.29
498
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GR716
50.4.6 Trace buffer breakpoint registers
The DSU contains two breakpoint registers for matching AHB addresses. A breakpoint hit is used to
freeze the trace buffer by clearing the enable bit. Freezing can be delayed by programming the DCNT
field in the trace buffer control register to a non-zero value. In this case, the DCNT value will be dec-
remented for each additional trace until it reaches zero and after two additional entries, the trace buf-
fer is frozen. A mask register is associated with each breakpoint, allowing breaking on a block of
addresses. Only address bits with the corresponding mask bit set to ‘1’ are compared during break-
point detection. To break on AHB load or store accesses, the LD and/or ST bits should be set.
Table 670.
Trace buffer AHB breakpoint address register
31
2
1
0
BADDR[31:2]
0b00
NR
0
rw
r
31: 2
Breakpoint address (BADDR) - Bits 31:2 of breakpoint address
1: 0
Reserved, read as 0
Table 671.
Trace buffer AHB breakpoint mask register
31
2
1
0
BMASK[31:2]
LD ST
NR
0
0
rw
rw rw
31: 2
Breakpoint mask (BMASK) - Bits 31:2 of breakpoint mask
1
Load (LD) - Break on data load address
0
Store (ST) - Break on data store address