GR716-DS-UM, May 2019, Version 1.29
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28.2.7 Conditional descriptors type 1
The conditional descriptor type 1 is an extension of the descriptor type described in the chapter 28.2.4.
The extension enables features to loop existing dma descriptor without software and automatic check
and compare for 0’s and 1’s in a specific register before next descriptor is executed. Extra features are
enabled by setting the bit Extended Mode (ME) in the GRDMAC control register and specifying
descriptor version 0x1 in descriptors used.
The extended descriptor is designed to be used with external trigger. If polling functionality is needed
it is recommended to setup a timer to trigger polling event to trigger poll an address for data. The con-
ditional descriptor type 1 will entering a state where it waits for a monitored input signal line to trig-
ger. When the monitored input line is sampled to a value of ‘1’, the data descriptor will be executed.
To set up a triggering conditional descriptor, the IT bit field in the descriptor’s control field needs to
be set to ‘1’. Bits 5:0 of the conditional address/triggering line field will specify which of the 64 input
lines of the IRQ_TRIG signal will be monitored. During the execution of the triggering conditional
descriptor, the triggering line is monitored every clock cycle, and when the value of the line is ‘1’, the
status of the specified conditional register is checked for match. The status of the specified register
needs match specified data and mask before conditional execution will terminate and the data descrip-
tor will be yield, fetching COND_SIZE bytes before going back to executing the conditional trigger-
ing. An optional retry counter, COND_RETRIES, can be enabled to set the maximum number of
retries that are allowed before conditional condition is considered to never be meet. Exceeding the
number of retries will stop the DMA and an error event will be issued.
Direct and simple matching can be achieved by the following formula, according to the termination
condition type selected in the conditional control field (CT)
The termination conditional be changed to check data in read register is not equal to by changing the
conditional control field (CT)
The data descriptor will be considered completed when all the bytes from the data descriptor, speci-
fied in the SIZE field, have been transfered, in amounts of COND_SIZE at each triggering. An
optional timeout counter can be enabled during the triggering conditional descriptor execution. By
setting the TE bit field in the core’s control register to ‘1’ and by setting the Timer Reset Value Regis-
ter to the required number of clock cycles, the descriptor execution is halted with a Timeout Error if
an interrupt is not received before the timer expires. The error halts the channel execution after even-
tual descriptor write-back is performed.
The conditional descriptor will considered to be complete when the data descriptors has been exe-
cuted the number of times specified in the conditional loop counter field, COND_CNT. When the
31: 0
Conditional Mask (COND_MASK) - Bit mask used in the conditional descriptor termination condi-
tion matching.
Table 283.
GRDMAC Conditional descriptor version 1 Termination condition type 0
Table 284.
GRDMAC Conditional descriptor version 1 Termination condition type 1
Table 282.
GRDMAC Conditional descriptor mask field (address offset 0x0C)
COND_ADDR
COND_DATA
COND_MASK
0
=
COND_ADDR
COND_DATA
COND_MASK
0
