GR716-DS-UM, May 2019, Version 1.29
487
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GR716
External IO selection and configuration is made in the system IO configuration registers (
GRG-
PREG
) in the address range from 0x8000D000 to 0x8000D03F. See section 7.1
The system can be configured to protect and restrict access to the AHBUART1 unit in the
MEM-
PROT
unit. For more information See section 47 for more information.
48.1
Overview
Each UART debug interface consists of a UART connected to the AMBA AHB bus as a master. A
simple communication protocol is supported to transmit access parameters and data. Through the
communication link, a read or write transfer can be generated to any address on the AMBA AHB bus.
48.2
Operation
48.2.1 Transmission protocol
The interface supports a simple protocol where commands consist of a control byte, followed by a 32-
bit address, followed by optional write data. Write access does not return any response, while a read
access only returns the read data. Data is sent on 8-bit basis as shown below.
Figure 84.
Block diagram
RX
TX
Receiver shift register
Transmitter shift register
AHB master interface
AHB data/response
AMBA AHB
Serial port
Controller
8*bitclk
Baud-rate
generator
AMBA APB
Figure 85.
Data frame
Start D0
Stop
D6
D5
D4
D3
D2
D1
D7
Figure 86.
Commands
Write Command
11 Length -1
Addr[31:24]
Addr[7:0]
Addr[15:8]
Addr[23:16]
Data[31:24]
Data[7:0]
Data[15:8]
Data[23:16]
Send
10 Length -1
Addr[31:24]
Addr[7:0]
Addr[15:8]
Addr[23:16]
Send
Read command
Receive
Data[31:24]
Data[7:0]
Data[15:8]
Data[23:16]
