Abov MC96F6432 Series, User Manual

Page: 77 / 327

MC96F6432
June 22, 2018 Ver. 2.9 77
P1OD (P1 Open-drain Selection Register) : 92H
7 6 5 4 3 2 1 0
P17OD P16OD P15OD P14OD P13OD P12OD P11OD P10OD
R/W R/W R/W R/W R/W R/W R/W R/W
Initial value : 08H
P1OD[7:0]
Configure Open-drain of P1 Port
0 Push-pull output
1 Open-drain output
P15DB (P1/P5 Debounce Enable Register) : DFH
7 6 5 4 3 2 1 0
– –
P54DB P52DB P17DB P16DB P12DB P11DB
– –
R/W R/W R/W R/W R/W R/W
Initial value : 00H
P54DB
Configure Debounce of P54 Port
0 Disable
1 Enable
P52DB Configure Debounce of P52 Port
0 Disable
1 Enable
P17DB Configure Debounce of P17 Port
0 Disable
1 Enable
P16DB
Configure Debounce of P16 Port
0 Disable
1 Enable
P12DB Configure Debounce of P12 Port
0 Disable
1 Enable
P11DB
Configure Debounce of P11 Port
0 Disable
1 Enable
NOTES) 1. If the same level is not detected on enabled pin three or four times in a row at the sampling clock, the
signal is eliminated as noise.
2. A pulse level should be input for the duration of 3 clock or more to be actually detected as a valid
edge.
3. The port debounce is automatically disabled at stop mode and recovered after stop mode release.
4. Refer to the port 0 debounce enable register (P0DB) for the debounce clock of port 1 and port 5.