MC96F6432
22
June 22, 2018 Ver. 2.9
MC96F6332L
(32-LQFP)
1
2
9
1
0
8
3
4
5
6
7
1
1
1
2
1
3
1
4
1
5
1
6
24
23
17
22
21
20
19
18
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
P55/RESETB
P40/VLC3/RXD0/SCL0/MISO0
P41/VLC2/TXD0/SDA0/MOSI0
P
5
2
/E
IN
T
8
/E
C
0
/B
L
N
K
P05/SEG24/AN3/EINT3/PWM4BB
P04/SEG25/AN2/EINT2/PWM4BA
P11/SEG15/AN12/EINT12/T2O/PWM2O
P12/SEG16/AN11/EINT11/T1O/PWM1O
P07/SEG22/AN5/EINT5/PWM4CB
P13/SEG17/AN10/EC1/BUZO
P06/SEG23/AN4/EINT4/PWM4CA
P
2
2
/S
E
G
1
1
/S
S
1
P
2
1
/S
E
G
1
2
/A
N
1
5
/S
C
K
1
P
2
0
/S
E
G
1
3
/A
N
1
4
/T
X
D
1
/S
D
A
1
/M
O
S
I1
P
1
0
/S
E
G
1
4
/A
N
1
3
/R
X
D
1
/S
C
L
1
/M
IS
O
1
P
2
7
/S
E
G
6
P
2
6
/S
E
G
7
P
3
1
/C
O
M
6
/S
E
G
4
P
3
0
/C
O
M
7
/S
E
G
5
P
5
1
/X
IN
P
5
0
/X
O
U
T
P
0
2
/A
N
0
/A
V
R
E
F
/E
IN
T
0
/T
4
O
/P
W
M
4
A
A
P
0
1
/T
3
O
/
D
S
C
L
P
0
0
/E
C
3
/
D
S
D
A
V
D
D
V
S
S
P32/COM5/SEG3
P33/COM4/SEG2
P42/VLC1/SCK0
P53/SXIN/T0O/PWM0O
P54/SXOUT/EINT10
P03/SEG26/AN1/EINT1/PWM4AB
Figure 3.3 MC96F6332L 32LQFP Pin Assignment
NOTES) 1. On On-Chip Debugging, ISP uses P0[1:0] pin as DSDA, DSCL.
2. The P14-P17, P23-P25, P34-P37 and P43 pins should be selected as a push-pull output or an input
with pull-up resistor by software control when the 32-pin package is used.
Summary of Contents for MC96F6432 Series
Page 24: ...MC96F6432 24 June 22 2018 Ver 2 9 4 Package Diagram Figure 4 1 48 Pin LQFP 0707 Package...
Page 25: ...MC96F6432 June 22 2018 Ver 2 9 25 Figure 4 2 44 Pin MQFP Package...
Page 26: ...MC96F6432 26 June 22 2018 Ver 2 9 Figure 4 3 32 Pin LQFP Package...
Page 27: ...MC96F6432 June 22 2018 Ver 2 9 27 Figure 4 4 32 Pin SOP Package...
Page 28: ...MC96F6432 28 June 22 2018 Ver 2 9 Figure 4 5 28 Pin SOP Package...