MC96F6432
326
June 22, 2018 Ver. 2.9
D. ESD Test Method
1) ESD Test Description
ESD Testing was perform on Zapmaster system using the Human-Body-Model (H.B.M) and Machine-Model
(M.M) according JESD22-A114F and EIA/JESD22-A115-A respectively. Human-Body-Model stresses devices by
sudden application of a high voltage supplied by a 100pF capacitor through 1.5k Ohms resistance. Machine-
Model stresses devices by sudden application of a high voltage supplied by a 200pF capacitor through very low
(0 Ohm) resistance.
2) ESD Test Circuit and Condition
Ri
R
C
DUT
Condition
1) Zap Interval : 1 second
2) Number of Zaps :
3 positive & 3 negative at room temp.
3) Criteria : Q.A Program
3) ESD Test Method : VDD Mode
VDD pin is grounded.
Other pins (VSS and I/O) are zapped, pin by pin.
4) ESD Test Method : VSS Mode
VSS pin is grounded
Other pins (VDD and I/O ) are zapped, pin by pin.
Summary of Contents for MC96F6432 Series
Page 24: ...MC96F6432 24 June 22 2018 Ver 2 9 4 Package Diagram Figure 4 1 48 Pin LQFP 0707 Package...
Page 25: ...MC96F6432 June 22 2018 Ver 2 9 25 Figure 4 2 44 Pin MQFP Package...
Page 26: ...MC96F6432 26 June 22 2018 Ver 2 9 Figure 4 3 32 Pin LQFP Package...
Page 27: ...MC96F6432 June 22 2018 Ver 2 9 27 Figure 4 4 32 Pin SOP Package...
Page 28: ...MC96F6432 28 June 22 2018 Ver 2 9 Figure 4 5 28 Pin SOP Package...
