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5.2 b: Application
204
YASKAWA ELECTRIC
SIEP C710636 02B YASKAWA U1000 Technical Manual
■
PID Block Diagram
Figure 5.24
Figure 5.24 PID Block Diagram
-
+
+
+
+
+
+
+
+
+
1
-1
+
+
+
-
Z
-1
+
-
+
+
+
+
+
Z
-1
-1
Z
-1
Frequency Reference 1 to 16
Frequency Reference
Selection 1/2
b1-01/15
Option Card
Serial Comm
Analog Input
A1/A2/A3
Pulse Input
Output
Frequency
P
1/s
b5-08
1
2
3
PID Setpoint
(U5-04)
Proportional Gain
Setting (P)
b5-02
Integral T
ime
Setting (I)
b5-03
Integral Limit Setting
b5-04
PID Output
Limit/Lower Limit
b5-06 / b5-34
PID Delay
T
ime
PID disable when:
- b5-01=0
- a JOG Command is Input
- PID Disable by Digital Input Enabled
0
PID Integral Hold
H1-
=31
PID Integral
Reset
H1-
=30
PID Output
Level Selection
b5-09
Enable / Disable Reverse
Operation when PID
Output is Negative
Frequency Reference
PID T
arget
PID Feedback
0
1
0
1
0
1
0
PID Input
(U5-02)
PID Feedback
(U5-01)
b5-07
b5-10
PID Output
Gain Setting
PID Of
fset
Adjustment
b5-15
PID Sleep Function Start Level
RUN
On/Of
f
b5-16
PID Sleep
Delay T
imer
Sleep Function
SFS
C1-
4
d1-01 to d1-16
H6-01=1
b5-05
1 or 3
2 or 4
b5-01
Derivative
T
ime (D)
not B
b5-05
b5-01
2 or 4
1 or 3
not 1
H3-02/10=B
Analog Input
A1/A2/A3
Pulse Input
0
PID Input Limit
b5-35
Disabled
Enabled
Analog Input
A1/A2/A3
0
not 16
H3-02/10
= 16
PID Dif
ferential
Feedback
(U5-05)
PID Adjusted
Feedback
(U5-06)
PID Ouput
(U5-03)
Derivative
T
ime (D)
Upper Limit
Fmax x109%
Lower Limit
Fmax x109%
Lower Limit 0
b5-1
1
1
0
Upper Limit
Fmax x109%
Always 1 when
b5-01 = 3/4
PID Input
Level Selection
H1-
=35
not 1
b5-18 = 1
Rog, 0Fh, bit 1
H6-01 = 2
H3-02/06/10 = C
not C
not 2
0
1
b5-01
Analog Input
A1/A2/A3
MEMOBUS Reg. 0006h
Pulse Input
b5-19
On
Of
f
PID Accel/Decel
T
ime
b5-17
PID Soft Starter Cancel
(H1-
= 34)
0
3/4
1/2
SIEP_C710636_02B_1_0.book 204 ページ 2015年11月25日 水曜日 午後4時56分