Rohm LAPIS SEMICONDUCTOR ML620Q503, Руководство пользователя

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ML620Q503/Q504 User's Manual
Chapter 15 I
2
C Bus Interface
FEUL620Q504 15–6
15.2.5 I
2
C Bus n Control Register (I2CnCON : n=0,1)
Address: 0F746H(I2C0CON0/I2C0CON), 0F747H(I2C0CON1),
0F756H(I2C1CON0/I2C1CON), 0F757H(I2C1CON1)
Access: R/W
Access size: 8/16 bits
Initial value: 0000H
7 6 5 4 3 2 1 0
I2CnCON0 I2nACT – – – – I2nRS I2nSP I2nST
R/W R/W R/W R/W R/W R/W W W R/W
Initial value 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
I2CnCON1 – – – – – – – –
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
I2CnCON is a special function register (SFR) to control transmit and receive operations.
Description of Bits
•
I2nST (bit 0)
The I2nST bit is used to control the communication operation of the I
2
C bus interface. When the I2nST
bit is set to “1”, communication starts. When “1” is overwritten to the I2nST bit in a control register
setting wait state after transmission/reception of acknowledgment, communication restarts. When the
I2nST bit is set to “0”, communication is stopped forcibly.
The I2nST bit can be set to “1” only when the I
2
C bus interface is in an operation enable state (I2nEN =
“1”).
When the I2nSP bit is set to “1”, the I2nST bit is set to “0”.
I2nST Description
0 Stops communication (initial value)
1 Start communication
•
I2nSP (bit 1)
The I2nSP bit is a write-only bit used to request a stop condition. When the I2nSP bit is set to “1”, the
bus shifts to the stop condition and communication stops. When the I2nSP bit is read, “0” is always read.
I2nSP Description
0 No stop condition request (initial value)
1 Stop condition request