Rohm LAPIS SEMICONDUCTOR ML620Q503, Руководство пользователя

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ML620Q503/Q504 User’s Manual
Chapter 7 Time Base Counter
FEUL620Q504 7–6
7.2.4 Low-Speed Time Base Counter Interrupt select Registers (LTBINT)
Address: 0F064H
Access: R/W
Access size: 8/16 bits
Initial value: 0630H
7 6 5 4 3 2 1 0
LTBINTL – LTI1S2 LTI1S1 LTI1S0 – LTI0S2 LTI0S1 LTI0S0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 1 1 0 0 0 0
15 14 13 12 11 10 9 8
LTBINTH – – – – – LTI2S2 LTI2S1 LT2S0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 1 1 0
LTBINT is a special function register(SFR) which specify low speed time base clock which is used as an interrupt
signal.
Description of Bits
•
LTI0S2-0 (bit 2 to 0)
The bits specify an assignable clock to LTBINT0. Initial value is T128HZ.
。
•
LTI1S2-0 (bit 6 to 4)
The bits specify an assignable clock to LTBINY1. Initial value is T16HZ.
•
LTI2S2-0 (bit 10 to 8)
The bits specify an assignable clock to LTBINT2. Initical value is T2HZ.
LTInS2 LTInS1 LTInS0
Assignable clock
0 0 0 T128HZ
0 0 1 T64HZ
0 1 0 T32HZ
0 1 1 T16HZ
1 0 0 T8HZ
1 0 1 T4HZ
1 1 0 T2HZ
1 1 1 T1HZ
* an interrupt may occur at setting.