Rohm LAPIS SEMICONDUCTOR ML620Q503, Руководство пользователя

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ML620Q503/Q504 User's Manual
Chapter 6 Clock Generation Circuit
FEUL620Q504 6–9
6.2.3 Frequency Control Register 23(FCON23)
Address: 0F004H
Access: R/W
Access size: 8/16 bits
Initial Value: 0002H
7 6 5 4 3 2 1 0
FCON2 HFLTSEL HFLTSEL – LFLTSEL – – XTM1 XTM0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 1 0
15 14 13 12 11 10 9 8
FCON3 – – – – – – – –
R/W R/W R/W R/W R/W R/W R/W R/W R/W
2).msg
Initial value
0 0 0 0 0 0 0 0
FCON23 is a special function register (SFR) used to select the clock for the low-speed clock generation circuit.
Description of Bits
•
XTM1-0 (bits 1 to 0)
The XTM1-0 bits are used to select the low-speed clock mode. Low-speed Crystal/ceramic oscillation
mode, low-speed built-in RC oscillation mode, or low-speed external clock input mode can be selected.
At system reset, the built-in low-speed RC oscillation mode is selected.
XTM1 XTM0 Description
0 0 Setting prohibited (the setting is ignored and the previous value is held)
0 1 Low-speed Crystal oscillation mode
1 0 Low-speed Built-in RC oscillation mode (initial value)
1 1 External low-speed clock input mode
[Note]
When switching the clock mode from the external low-speed clock input mode to a the low-speed crystal
oscillation mode, set the clock mode to the low-speed crystal oscillation mode after setting the clock mode
in low-speed built-in RC oscillation mode.
Also when switching the clock mode from the low-speed crystal oscillation mode to the low-speed external
clock input mode, set the clock mode to the external low-speed clock input mode after setting the clock
mode in low-speed build in RC oscillation mode.
If low-speed built-in RC oscillation mode is not set before setting low-speed crystal oscillation mode or
external low-speed clock input mode, these functions cannot be guaranteed.
•
LFLTSEL
（
bit 4
）
LFLTSEL bit is used to select noise filter on/off at low-speed crystal/ceramic oscillation or external
low-speed clock input mode.
LFLTSEL Description
0 Low speed clock noise filter is off (initial value)
1 Low speed clock noise filter is on