Rohde & Schwarz FSV3000, Руководство пользователя

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Network operation and remote control
R&S
®
FSVA3000/ R&S
®
FSV3000
788 User Manual 1178.8520.02 ─ 08
Bit No. Meaning
2 IF_OVerload
This bit is set if an overload occurs in the IF path.
The R&S FSV/A displays the keyword "ADC OVLD".
3 Input Overload
This bit is set if the signal level at the RF input connector exceeds the maximum.
The RF input is disconnected from the input mixer to protect the device. In order to re-enable
measurement, decrease the level at the RF input connector and reconnect the RF input to the
mixer input.
For details on the protection mechanism see "RF Input Protection" on page 357 or
INPut<ip>:ATTenuation:PROTection:RESet
on page 1037.
The R&S FSV/A displays the keyword "INPUT OVLD".
4 to 14 Unused
15 This bit is always 0.
11.2.2.13 STATus:QUEStionable:TEMPerature register
The STATus:QUEStionable:TEMPerature register contains information about possible
temperature deviations that may occur during operation of the R&S
FSV/A. A separate
temperature register exists for each active channel.
You can read out the register with
STATus:QUEStionable:TEMPerature:
CONDition?
or
STATus:QUEStionable:TEMPerature[:EVENt]?
Table 11-13: Meaning of the bits used in the STATus:QUEStionable:TEMPerature register
Bit No. Meaning
0 This bit is set if the frontend temperature sensor deviates by a certain degree from the self-
alignment temperature.
During warmup, this bit is always 1.
For details see "Temperature check" on page 685.
1 to 14 Unused
15 This bit is always 0.
11.2.2.14 STATus:QUEStionable:TIMe register
The
STATus:QUEStionable:TIMe
register contains information about possible time
errors that may occur during operation of the R&S FSV/A. A separate time register
exists for each active channel.
You can read out the register with
STATus:QUEStionable:TIME:CONDition?
or
STATus:QUEStionable:TIME[:EVENt]?
Status reporting system