Omron CP1L CPU UNIT - 03-2009, Руководство по эксплуатации

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52
Specifications Section 2-2
Address Input operation settings High-speed counters Origin searches
Word Bit Normal
inputs
Interrupt
inputs
(See note.)
Quick-
response
inputs
Operation settings:
High-speed counters enabled
Phase-Z reset
Origin searches
enabled for pulse
outputs 0 and 1
Single-phase
(increment
pulse input)
Two-phase (differential
phase x4, up/down, or
pulse/direction)
CIO 1 00 Normal
input 12 --- --- --- --- ---
01 Normal
input 13 --- --- --- --- ---
02 Normal
input 14 --- --- --- --- ---
03 Normal
input 15 --- --- --- --- ---
04 Normal
input 16 --- --- --- --- ---
05 Normal
input 17 --- --- --- --- ---
06 Normal
input 18 --- --- --- --- ---
07 Normal
input 19 --- --- --- --- ---
08 Normal
input 20 --- --- --- --- ---
09 Normal
input 21 --- --- --- --- ---
10 Normal
input 22 --- --- --- --- ---
11 Normal
input 23 --- --- --- --- ---
CIO 2 00 Normal
input 24 --- --- --- --- ---
01 Normal
input 25 --- --- --- --- ---
02 Normal
input 26 --- --- --- --- ---
03 Normal
input 27 --- --- --- --- ---
04 Normal
input 28 --- --- --- --- ---
05 Normal
input 29 --- --- --- --- ---
06 Normal
input 30 --- --- --- --- ---
07 Normal
input 31 --- --- --- --- ---
08 Normal
input 32 --- --- --- --- ---
09 Normal
input 33 --- --- --- --- ---
10 Normal
input 34 --- --- --- --- ---
11 Normal
input 35 --- --- --- --- ---