![background image](http://html1.mh-extra.com/html/omron/cp1l-cpu-unit-03-2009/cp1l-cpu-unit-03-2009_operation-manual_742084134.webp)
100
Fail-safe Circuits
Section 3-1
3-1
Fail-safe Circuits
Always set up safety circuits outside of the PLC to prevent dangerous condi-
tions in the event of errors in the CP1L CPU Unit or external power supply. In
particular, be careful of the following points.
Supply Power to the
CP1L CPU Unit before
the Controlled
System
If the PLC's power supply is turned ON after the controlled system's power
supply, outputs in Units such as DC Output Units may malfunction momen-
tarily. To prevent any malfunction, add an external circuit that prevents the
power supply to the controlled system from going ON before the power supply
to the PLC itself.
Managing CPU Unit
Errors
When any of the following errors occurs, PLC operation (program execution)
will stop and all outputs from Output Units will be turned OFF.
• A CPU error (watchdog timer error) or CPU on standby
• A fatal error (memory error, I/O bus error, duplicate number error, too
many I/O points error, I/O setting error, program error, cycle time too long
error, or FALS(007) error) (See note.)
Always add any circuits necessary outside of the PLC to ensure the safety of
the system in the event of an error that stops PLC operation.
Note
When a fatal error occurs, all outputs from Output Units will be turned OFF
even if the IOM Hold Bit has been turned ON to protect the contents of I/O
memory. (When the IOM Hold Bit is ON, the outputs will retain their previous
status after the PLC has been switched from RUN/MONITOR mode to PRO-
GRAM mode.)
Managing Output
Malfunctions
It is possible for an output to remain ON due to a malfunction in the internal
circuitry of the Output Unit, such as a relay or transistor malfunction. Always
add any circuits necessary outside of the PLC to ensure the safety of the sys-
tem in the event that an output fails to go OFF.
Interlock Circuits
When the PLC controls an operation such as the clockwise and counterclock-
wise operation of a motor and if there is any possibility of an accident or
mechanical damage due to faulty PLC operation, provide an external interlock
such as the one shown below to prevent both the forward and reverse outputs
from turning ON at the same time.
Example
This circuit prevents outputs MC1 and MC2 from both being ON at the same
time even if both PLC outputs CIO 100.00 and CIO 100.01 are both ON, so
the motor is protected even if the PLC is programmed improperly or malfunc-
tions.
CP1H
MC2
CIO
100.00
MC1
CIO
100.01
MC1
MC2
Interlock circuit
Motor clockwise
Motor counterclockwise
Содержание CP1L CPU UNIT - 03-2009
Страница 1: ...Cat No W462 E1 06 CP1L CPU Unit SYSMAC CP Series CP1L L_0D_ CP1L M_0D_ OPERATION MANUAL...
Страница 2: ......
Страница 4: ...iv...
Страница 10: ...x...
Страница 22: ...xxii...
Страница 34: ...xxxiv Conformance to EC Directives 6...
Страница 70: ...36 Function Blocks Section 1 5...
Страница 584: ...550 Trouble Shooting Section 8 7...
Страница 627: ...593 Sample Application Section 9 12 Network Settings Network Tab Network Settings Driver Tab...
Страница 630: ...596 Sample Application Section 9 12...
Страница 654: ...620 Troubleshooting Unit Errors Section 11 4...
Страница 662: ...628 Replacing User serviceable Parts Section 12 2...
Страница 668: ...634 Standard Models Appendix A...
Страница 698: ...664 Auxiliary Area Allocations by Function Appendix C...
Страница 746: ...712 Auxiliary Area Allocations by Address Appendix D...
Страница 773: ...739 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Страница 774: ...740 Connections to Serial Communications Option Boards Appendix F...
Страница 806: ...772 Index...
Страница 808: ...774 Revision History...