![background image](http://html1.mh-extra.com/html/omron/cp1h-cpu-05-2006/cp1h-cpu-05-2006_operation-manual_742082222.webp)
191
Interrupt Functions
Section 5-1
MSKS(690) Operands
Note
*Input interrupts 2 and 3 are not supported by the Y CPU Units.
Writing the Interrupt
Task’s Program
Create programs for interrupt tasks 140 to 147, which are executed by the cor-
responding input interrupt. Always put an END(001) instruction at the last
address of the program.
Input Interrupt
Settings and
Operation
This example shows how to execute interrupt task 141 when 200 up-differenti-
ated pulses have been counted at input CIO 0.01. (The counter is an incre-
menting counter.)
Settings
1,2,3...
1.
Connect an input device to input 0.00.
2.
Use the CX-Programmer to set input 0.01 as an input interrupt in the PLC
Setup.
3.
Use the CX-Programmer to create the program to use for interrupt pro-
cessing and allocate the program to interrupt task 141.
4.
Use the CX-Programmer to set a high-speed counter SV of 00C8 hex (200
decimal) in A533.
5.
Use the CX-Programmer to write MSKS(690) in the program.
Operation
When execution condition W0.00 goes ON, MSKS(690) is executed to enable
operation of the input interrupt in counter mode.
Input interrupt
number
Interrupt
task
number
1. Up-differentiation or
Down-differentiation
2. Enabling/Disabling the
input interrupt
N
S
N
S
Input
interrupt
number
Count
trigger
Input
interrupt
number
Enable/
Disable
Input interrupt 0
140
110 (or 10)
#0000: Up-
differenti-
ated pulses
#0001:
Down-dif-
ferentiated
pulses
100 (or 6)
#0002: Start
counting down
(decrement-
ing) and enable
interrupts
#0003: Start
counting up
(incrementing)
and enable
interrupts
Input interrupt 1
141
111 (or 11)
101 (or 7)
Input interrupt 2
142
112 (or 12)
102 (or 8)
Input interrupt 3
143
113 (or 13)
103 (or 9)
Input interrupt 4
144
114
104
Input interrupt 5
145
115
105
Input interrupt 6* 146*
116
106
Input interrupt 7* 147*
117
107
@MSKS(690)
111
#0000
@MSKS(690)
111
#0003
W0.00
(Execution condition)
Specifies input interrupt 1.
Specifies up-differentiated pulses.
Specifies input interrupt 1.
Specifies an incrementing counter,
starts counting, and enables the input
interrupt.
Содержание CP1H-CPU - 05-2006
Страница 1: ...OPERATION MANUAL CP1H CPU Unit SYSMAC CP Series CP1H X40D CP1H XA40D CP1H Y20DT D Cat No W450 E1 02...
Страница 2: ...CP1H X40D CP1H XA40D CP1H Y20DT D CP1H CPU Unit Operation Manual Revised May 2006...
Страница 3: ...iv...
Страница 11: ...xii TABLE OF CONTENTS...
Страница 15: ...xvi...
Страница 19: ...xx...
Страница 31: ...xxxii Conformance to EC Directives 6...
Страница 71: ...40 Function Blocks Section 1 5...
Страница 133: ...102 Computing the Cycle Time Section 2 7...
Страница 169: ...138 CPM1A Expansion I O Unit Wiring Section 3 6...
Страница 411: ...380 Clock Section 6 8...
Страница 519: ...488 Replacing User serviceable Parts Section 10 2...
Страница 527: ...496 Standard Models Appendix A...
Страница 535: ...504 Dimensions Diagrams Appendix B...
Страница 628: ...597 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Страница 629: ...598 Connections to Serial Communications Option Boards Appendix F...
Страница 659: ...628 PLC Setup Appendix G...
Страница 665: ...634 Index work words 159 write protection 370...
Страница 667: ...636 Revision History...