Omron CP1H-CPU - 05-2006, Руководство по эксплуатации

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Interrupt Functions
Section 5-1
b. The following example shows duplicate processing by an interrupt
task, which interrupts processing while BSET is writing to a block of
words and yields an incorrect comparison result.
Since the interrupt occurs during BSET(071) processing and before #1234 is
set in D10, the content of D0 and D10 do not match when the comparison is
made in the interrupt task (*1) and output A remains OFF.
In the end (*2), the D0 and D10 both contain #1234 and match, but the correct
comparison result is not reflected in comparison result output A.
Prevention of Duplicate Processing
5-1-2 Input Interrupts (Direct Mode)
This function executes an interrupt task when the corresponding input signal
(up or down differentiated) is received.
Input Interrupt Bit and
Terminal Allocations
The following diagrams show the input bits and terminals that are used for the
input interrupt function in each CPU Unit.
X/XA CPU Units The 8 input bits CIO 0.00 to CIO 0.03 and CIO 1.00 to CIO 1.03 can be used
for input interrupts.
BSET
#1234
D0
D10
CMP
D0
D10
A
1234
1234
1234 1234 1234
1234
0502
ABCD
ABCD
ABCD
1234
OFF
OFF* 1
003E 0502
D0 D1 D2
D10
A
1234*
2 OFF
Cyclic task
Interrupt task
Equals Flag
#1234 set in D0.
#1234 set in D1.
#1234 set in D2.
#1234 set in D10.
BSET(071)
processing CMP(020)
processing
Read D0.
Read D1.
Output result.
Compare D0 and D10.
Interrupted.
Continued.
Interrupt occurs.
Interrupt completed.
Flow of Processing
BSET
#1234
D0
D10
DI
EI
Cyclic task
Disables execution of
interrupt programs.
Enables execution of
interrupt programs.