HP 3562A, Руководство по обслуживанию

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MOD E L 3562A
C I RC U IT D E S C R I P T I O N S
HARDWARE CONTROL REG I ST E R OUTPUTS
W I N lOC
B N KSE lH
SWAP
CTR2D N l
TWOCH
REA lDATA
SEQSE lO
SEQSEl1
lEV2
lEV1
lEVO
TBSEl2
T B S E l1
TBSELO
SCAlE1
SCAlEO
Window location. The data for the standard windows is on the FFT board;
the data for user defi ned windows are kept in global RAM.
Bank select, active h igh. Selects upper or lower 32k of memory.
Swap two halves of the time buffer.
Set cou nter two to count down, active low.
Measu rement is two-channel as opposed to si ngle channel.
Data is real as opposed to complex.
These two l ines select one of three sequences for the I/O sequencer; this
tells it how to control the cou nters and page register depend ing on whether
the execution is process ing a window, an FFT, or a deinterlace (terms
associated with FFT).
.
These th ree l i nes sel ect one of seven levels within the FFT process. The
seven levels are: window, five butterfly passes, and (if necessary) deinterlace.
Each level processes an entire block of data i n memory. The LEV signals
help keep track of addressing.
These three l i nes are used to choose one of fou r signals u sed by the test
bit mux.
These l ines are used to select one of three signals to convey i nformation
about the math resu lts on the previous level to the page register.
OTH E R S I G NALS
iDOO
I nternal data bus l ines 0 through 1 5.
SDOUTE N l
System data bus output enable, active low.
DIVBY4
Two l ines conveying information from the pseudo-scale ROM to the TMS320
DIVBY2
test bit mux concern i n g data size.
PASS DONE
Signals the end of a leve! (see LEV).
D I DO N E
Same as PASSDON E for the deinterlace pass.
I RQ320
I nterrupt request to the TMS320 m icroprocessor.
lDCAl
Load coefficient ad dress, active low. Signal from the I/O sequencer which
loads data on the internal data bus into the coefficient ROM address inputs.
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