HP 3562A, Руководство по обслуживанию

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C I RC U IT D E SCRI PT IONS
MOD E L 3562A
6-52
M EASUREM ENT STAT E MACH IN E
T h is block consists of five parts:
Command Register
Measurement Contro l Machine
Status Register
Start/Stop Control
Trigger Contro l
T h is block, configu red by the system C P U , controls how the digital fi lter assem bly works
in the various modes.
The
co mmand register
(fli p-flo ps A6U307 and A6U1 09) is used to read data l ines from
the local data bus i nto the me asurem ent state machine. The comm and is clocked i nto
the register by the signal WRI BCCM D L (write I BC com mand) f rom the add ress decoder.
(The digital fi lter assembly is sometimes cal led the input buffer control.) The commands
configure the measu rement state machi ne, control the LO sel ection on the d igital filter
board, and provide information to the trigger LED control block.
The
measu rement contro l m.achine
senses configu ration and status signals and controls
the measu rement. When it is configu red for the type of measu rement and receives a start
s ig nal, the measu rement control mach ine enables the measurement to start. A measu re­
ment is com plete when OUT4 is activated . OUT4 is rec locked, cal led BLKFU LLH, and
connected to an input of the measurement control machi ne. The measurement is term inated
by activati ng the SET BLKREADYL signal, causing a CPU i nterrupt. The CPU decides when
the transfer to RAM may be executed and grants the global bus appropriate ly.
The
status register
is an eight-l ine latch which allows the A1 CPU to read the status of
the digital fi lter assem bly. The status word is latched onto the local data bus when the
RD I BCSTATL signal is activated . Bit 0 is a signal cal led NOTREALT I M E FLG . This signal
activates when data can not be moved through the DFA fast enough to prevent delay
of further measurements. I n this case, the data in global RAM is not updated fast enough
to be real time. This flag is reset every ti me the status \vord is read . If the cond ition is
stii l not real time, the reset does not change the status of the NOTREALT I ME FLG signal
(C LR overrides a SET com mand).
�
are to
m easu rements. I n a triggered measurement the d igital fi lter begi ns processing data and
storing it in RAM when the trigger board senses the trigger signal. There is also some inter­
action with the sou rce. Here is an example sequence of events for a triggered measurement:
If pretrigger delay is active, data is taken before a trigger signal is rece ived . If
pretrigger delay is 1 00 samples, the cou nter keeps track of the nu mber of samples
and the trigger signal is ignored u ntil at least this many samp les are taken. O UT1
is active when pretrigger delay is complete. The trigger control IC recogn izes this
and arms the trigger by activating the ARML signal. This signal goes to the d igital
sou rce which is waiti ng for a trigger.
When the digital source receives the trigger it activates the signal BFST (buffer
start) going back to the trigger control ler on A6.