HP 3562A, Руководство по обслуживанию

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C I RC U I T D E SCRI PT IO NS MOD E L 3S62A
6-1 36
F LTRST
D I G ITA L F I LTER MASTER RESET
This signal is from the AS D igital Filter control ler to the A6 digital fi lter
assembly. It goes high when a read filter status com mand or a
read/write to an internal DMA controller register command has been
completed. FL TRST is used to synchronize the chan nel
1
and chan nel
2 d igital fi lter circu its.
GAH to GA1 6 l
G LOBAL ADDRESS BUS
Active Low
The global address bus consists of 1 6 l i nes that allow the A8 G lobal
RAM to be add ressed by the fo l lowing assembl ies:
A2
AS
A7
A9
System CPU
Digital Filter
Floating Point Transform Processor
Fast Fou rier Processor
G O O l to G01 5 l
G LOBAL DATA B U S
Active Low
G OSl
The global data bus provides a communi cation path between the
fol lowing assembl ies:
A2
AS
A7
A8
A9
A1 7
System CPU
Digital Filter
Floating Point Transform Processor
Gl obal RAM/D isplay
Fast Fou rier Processor
Display I nterface
G LOBAL DATA STRO B E
Active Low
When a device reads A8 G lobal RAM, the low to high edge of the global
. data strobe signal indicates val id RAM data is on the global data bU3.
Valid data must be set up a m in i m u m of 30 uS before the rising edge
of G D S L a n d h e l d a m i n i m u m of 20 n s afterw a r d s .
{floe·
RANr. ·"
This bus provides a com m u n ication path between the fo l lowing
assem bl ies:
A2
AS
A7
A8
A9
A1 7
System C PU
D igital Filter
Floating Point Transform Processor
G lobal RAM/D isplay
Fast Fourier Processor
Display I nterface