Universal Serial Bus (USB)
18-18
Am186™CC/CH/CU Microcontrollers User’s Manual
For the USB control endpoint, the system software is responsible for decoding and servicing
several of the USB standard commands and all device class or vendor specific commands.
Hardware is provided that allows the system software to detect incoming commands, and
respond appropriately. The hardware also allows the software to detect all command abort
scenarios.
18.5.3
Handling USB Data
The USB peripheral controller handles all of the low-level USB protocol requirements in
hardware. Data movement between device memory or other microcontroller peripherals
and the USB peripheral controller’s endpoints is managed by device software executing on
the microcontroller CPU.
The device software can use status polling or interrupts to handle FIFO data for any endpoint
(control, interrupt, and A–D). In addition, the data endpoints (A–D) support either general-
purpose DMA or SmartDMA channel transfers.
Device software sets up the method of operation for the endpoints by programming control
and definition registers. There are register bits to enable or disable interrupts that can be
generated as data transfers proceed, or the software can poll status bits to determine the
status of each endpoint. Registers for each data endpoint determine the DMA channels
used (if any), the endpoint’s direction (IN or OUT, relative to the host), and its type
(isochronous, bulk, or interrupt). These registers are also used to set up other information
used in the USB configuration process.
For control, interrupt, and bulk data transfers, USB guarantees correct data delivery with
automatic retry. Microcontroller hardware performs this task transparently to the software
except for data endpoints that have been configured to use DMA. When DMA is being used,
the device software is involved in error detection and recovery.
For isochronous data transfers, the USB specification calls for only a good-faith attempt at
delivery. Isochronous transfers call for real-time delivery of each packet, so damaged
packets cannot be retransmitted.
Special status and interrupt bits are provided for the control endpoint to indicate whether
the packet currently in that endpoint’s FIFO is a command that must be handled by device
software.
18.5.4
Polled I/O
In Polled I/O mode, no DMA channel is specified, and interrupts are disabled. The device
software must actively poll the USB status register to determine when it owns the endpoint’s
FIFO, and then it must write or read the endpoint’s Data Port register to fill or empty the FIFO.
An endpoint operates in this mode only when the maximum packet size has been
programmed to be less than or equal to the size of the FIFO. In this mode, the FIFO cannot
operate in a circular fashion as it does for DMA transfers (see page 18-19).
For a receive endpoint (OUT direction relative to the host), the USB peripheral controller
sets the endpoint’s ACT_REQ bit in the status register whenever the FIFO is full of valid
data, or when an end-of-packet event has occurred. If this bit is set, the software can empty
the FIFO the next time it polls this endpoint. The amount of valid data in the FIFO is indicated
by the endpoint’s Received Packet Size and Buffer Status registers. When software has
finished reading the FIFO, it must clear the ACT_REQ bit to release FIFO ownership to the
USB peripheral controller.
Содержание Am186 CC
Страница 1: ...Am186 CC CH CU Microcontrollers User s Manual Order 21914B...
Страница 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Страница 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Страница 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Страница 39: ...Architectural Overview Am186 CC CH CU Microcontrollers User s Manual 1 15 Figure 1 6 32 Channel Linecard CH CC...
Страница 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Страница 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Страница 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Страница 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Страница 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Страница 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Страница 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...