High-Level Data Link Control (HDLC)
Am186™CC/CH/CU Microcontrollers User’s Manual
15-7
15.5
OPERATION
15.5.1
Usage
Note: Before using the HDLC channels, configure the multiplexed pins for HDLC use (see
Table 15-1 on page 15-4). When using HDLC Channel D on the
Am
186CC microcontroller,
be sure to configure the ITF4 bit in the SYSCON register correctly.
The HDLC portion of the microcontroller is an extremely flexible serial communications
block that can be configured to support data movement in a variety of applications. When
initializing the HDLC channels for a particular operation, it is best to establish the Time Slot
Assigner and general HDLC functionality before beginning data reception or transmission.
Configure HDLC functionality through the HxCON, HxTCON0, HxTCON1, and HxRCON1
registers. Establish address matching through the address match registers and their
associated masks. Finally, enable the desired interrupts by setting the corresponding bits
in the appropriate mask registers.
To configure the HDLC channels, use the following procedure:
1. Configure the Time Slot Assigners (TSAs) as described in “Usage” on page 16-7.
2. Configure any required HDLC channel operating modes:
a. Configure the NRZI encoding, transparent mode, loop remote, loop local, or CRC type
by programming the HxCON register.
b. For transmissions, configure the flag idle, multidrop mode, automatic CTS, bit order,
clock invert, GCI (on the Am186CC microcontroller only), output drive, or transmit
delay by programming the HxTCON1 register.
20h
HxMACNTP
HDLC Channel Mismatch Address
Counter Peek
Copy of HxMACNT register that does not
change when read.
22h
HxA0
HDLC Channel Address 0
Contains the value to compare to the address
in the received frames. The address bits can
be masked with HxA0MSK.
24h
HxA0MSK
HDLC Channel Address Mask 0
Mask register for HxA0. When a mask bit is 0
(the reset value), the bit is always matched.
This means all frames are accepted when
none of the mask bits are set.
26h
HxA1
HDLC Channel Address 1
Address match and mask registers. See
descriptions for HxA0MSK and HxA0.
28h
HxA1MSK
HDLC Channel Address Mask 1
2Ah
HxA2
HDLC Channel Address 2
2Ch
HxA2MSK
HDLC Channel Address Mask 2
2Eh
HxA3
HDLC Channel Address 3
30h
HxA3MSK
HDLC Channel Address Mask 3
Notes:
1. The
x
shown in the register name can be A, B, C, or D, depending on the channel selected. The offset shown is
for Channel A; for Channel B, add 40h to the offset shown; for Channel C, add 80h; and for Channel D, add C0h.
2. The Am186CC and Am186CH microcontrollers support Channels A and B; the Am186CC microcontroller also
supports Channels C and D.
Table 15-2
HDLC Register Summary (Continued)
Offset
1
Register
Mnemonic
2
Register Name
Description
Содержание Am186 CC
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Страница 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
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Страница 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Страница 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Страница 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Страница 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
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