HDLC External Serial Interface Configuration (TSAs)
16-8
Am186™CC/CH/CU Microcontrollers User’s Manual
4. To establish byte alignment in transparent mode, additional configuration is necessary
as follows:
a. Enable transmit FIFO (TFIFOEN bit), force abort (FORABR bit), and transmit enable
(HTEN bit) of the HxTCON0 register for each specific HDLC channel.
b. Enable receiver (HREN bit) of the HxRCON0 register for each specific HDLC channel.
c. Toggle (set, then clear) HDLC reset (HRESET bit) of the HDLC channel control register
(HxCON) for each specific HDLC channel.
d. Clear HxISTAT0 and HxISTAT1 registers for each specific HDLC channel.
The first byte received or transmitted may be corrupted while the HDLC is performing the
alignment. This effect can be masked on the transmit side by configuring the transmitter to
use mark idles and making the first byte transmitted all 1s (FFh).
16.5.2
Programmable Time Slots
Each TSA is unique, and time slots can start and stop on any bit boundary within a time-
division multiplexed (TDM) frame, up to a maximum of 4096 bit positions. Frame boundary
overlapping is allowed and occurs whenever the programmed bit start point exceeds the
bit stop point. The microcontroller supports the isolation of 8-bit time slots from 0 to 155 on
a standard 8-KHz TDM frame (this limitation is due to the 10-MHz limitation of HDLC).
The ability to define time slot start and stop points allows for adjustable channel sizing and
placement. Adjustable channel sizing enables the TDM data channel to or from an individual
HDLC to support differing data rates.
In the Am186CC microcontroller, the channel adjustment and placement feature is an
essential factor for the creation of a GCI frame. In GCI applications, the GCI D channel
must be size-adjusted to two bits and the GCI B channels must be size-adjusted to eight
bits (see Chapter 17, “General Circuit Interface (GCI),” for further information regarding B
and D channel size and placement).
The adjustable sizing feature also allows the HDLC channel to be used for ISDN LAP-D
and reduced data mode X.25 LAP-B transmissions such as 56 Kbit/s.
Certain applications do not use the entire allocated time slot, but do require a defined
polarity for the remaining unused bit positions. For these applications, the user is given the
option of adding additional polarity bits (up to seven) to fill out the remaining bit positions.
In short, the user must program a start point, a stop point, the number of bits remaining to
complete the allocated time slot, and a polarity for the remaining unused bit positions.
Note: Since a maximum clock rate of 10 MHz is supported, the utilization of the full 4096
bit range is sync rate dependent. For example, the standard 8-KHz frame does not support
bit ranges above 1250 bit positions or 156 8-bit time slots (this requires a clock rate higher
than 10 Mhz). Applications capable of supporting lower sync rate frequencies can use the
full bit range.
16.5.3
Muxing Logic
For the most part, the muxing logic controls the path data takes from an HDLC to an external
communication interface (or vice versa). The exception to this can be seen in the last mux
stage on interface C in the Am186CC microcontroller. Here, one of the mux options provides
an adjusted GCI clock and frame sync source for external interface C. For more information,
see “GCI Frame Sync and Clock Conversion” on page 16-12.
CC
CC
Содержание Am186 CC
Страница 1: ...Am186 CC CH CU Microcontrollers User s Manual Order 21914B...
Страница 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Страница 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Страница 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Страница 39: ...Architectural Overview Am186 CC CH CU Microcontrollers User s Manual 1 15 Figure 1 6 32 Channel Linecard CH CC...
Страница 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Страница 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Страница 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Страница 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Страница 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Страница 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Страница 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...