DMA Controller
Am186™CC/CH/CU Microcontrollers User’s Manual
8-19
between destination-synchronized transfers. Table 8-8 shows the maximum DMA transfer
rates based on the different synchronization strategies.
Figure 8-5
Destination-Synchronized General-Purpose DMA Transfers
Deasserting DRQ
In externally synchronized transfers, DRQ1 or DRQ0 must be deasserted before the end
of the DMA transfer to prevent another DMA cycle from occurring. The timing for the required
deassertion depends on whether the transfer is source-synchronized or destination-
synchronized.
A DMA request is not acknowledged from the same source for four processor clock cycles
after the end of the deposit cycle. In a source-synchronized DMA transfer, the DRQ signal
must be deasserted at least four clocks before the end of the transfer. If more transfers are
not required, a source-synchronized transfer allows the source device at least three clock
cycles from the time it is acknowledged to deassert its DRQ line. For more information, see
“DMA Acknowledge” on page 8-10.
Table 8-8
Maximum DMA Transfer Rates
Synchronization Type
Maximum DMA
Transfer Rate (Mbytes/s)
50 MHz
40 MHz
25 MHz
Unsynchronized
12.5
10
6.25
Source-synchronized
12.5
10
6.25
Destination-synchronized
(CPU needs bus)
8.33
5
3.125
Destination-synchronized
(CPU does not need bus)
10.0
5
3.125
T1
T2
T3
T4
T1
T2
T3
T4
CLKOUT
DRQ
(First case)
DRQ
(Second case)
Fetch Cycle
Deposit Cycle
1
2
TI
TI
Notes:
1. This destination-synchronized transfer is not followed immediately by another DMA transfer,
because DRQ is deasserted during the four idle states.
2. This destination-synchronized transfer is immediately followed by another DMA transfer, because
DRQ is not deasserted soon enough.
TI
TI
T1
Содержание Am186 CC
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Страница 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Страница 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Страница 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Страница 39: ...Architectural Overview Am186 CC CH CU Microcontrollers User s Manual 1 15 Figure 1 6 32 Channel Linecard CH CC...
Страница 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Страница 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Страница 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Страница 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Страница 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Страница 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Страница 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...