System Overview
3-30
Am186™CC/CH/CU Microcontrollers User’s Manual
3.6.3
Operation
3.6.3.1
Address and Data Buses
The 80C186 and 80C188 microcontrollers use a multiplexed address and data (AD) bus.
The address is present on the AD bus only during the t
1
clock phase. The Am186CC/CH/CU
microcontrollers provide the multiplexed AD bus and, in addition, provide a nonmultiplexed
address (A) bus. The A bus provides an address to the system for the complete bus cycle.
During refresh cycles, the AD bus is driven during the t
1
phase and the values are three-
stated during the t
2
, t
3
, and t
4
phases. The value driven on the A bus is undefined during
a refresh cycle.
The nonmultiplexed address bus (A19–A0) is valid one-half CLKOUT cycle in advance of
the address on the AD bus. When used with the modified UCS and LCS outputs and the
byte write enable signals, the A19–A0 bus provides a seamless interface to external SRAM,
DRAM, and Flash/EPROM memory systems.
For systems where power consumption is a concern, it is possible to disable the address
from being driven on the AD bus on the microcontroller during the normal address portion
of the bus cycle for accesses to RAS0, RAS1, upper (UCS), and lower (LCS) address
spaces. In this mode, the affected bus is placed in a high-impedance state during the
address portion of the bus cycle. This feature is enabled through the DA bits (bit 7) in the
Upper Memory Chip Select (UMCS) and Lower Memory Chip Select (LMCS) registers. In
addition, the DISMEM bit (bit 11, for memory addresses) and the DISIO bit (bit 10, for I/O
addresses) in the SYSCON register serve as global address disables to prevent address
bits from appearing on the AD15–AD0 bus. Setting the DISMEM bit overrides clearing the
DA bits.
When address disable is in effect, the number of signals that assert on the bus during all
normal bus cycles to the associated address space is reduced, thus decreasing power
consumption, reducing processor switching noise, and preventing bus contention with
memory devices and peripherals when operating at high clock rates. For more information
about chip selects, see Chapter 5, “Chip Selects.”
If the ADEN pin is asserted during processor reset, the values of the DA, DISMEM, and
DISIO bits are ignored and the address is driven on the AD bus for all accesses, thus
preserving the industry-standard 80C186 and 80C188 microcontrollers’ multiplexed
address bus and providing support for existing emulation tools.
For timing diagrams, see the data sheets for the Am186CC/CH/CU microcontrollers. For
more information about the registers, see the
Am186™CC/CH/CU Microcontrollers
Register Set Manual, order #21916.
3.6.3.2
Programmable Bus Sizing
The 80C186 microcontroller provided a 16-bit wide data bus over its entire memory and
I/O address ranges, but did not allow accesses to an 8-bit wide bus. However, the data bus
width on the Am186CC/CH/CU microcontrollers is programmable through the Upper
Memory Chip Select (UMCS), Lower Memory Chip Select (LMCS), and PCS and MCS
Auxiliary (MPCS) registers. The USIZ bit (bit 5) in the UMCS register determines the width
of the data bus for memory accesses to the upper memory region and the LSIZ bit (bit 5)
in the LMCS register determines the width for the lower memory region. The OMSIZ bit
(bit 5) in the MPCS register specifies the width of the data bus for memory accesses to all
non-upper and non-lower memory regions (i.e., MCS space, PCS space in memory, and
the remaining memory space that does not reside in one of the enabled chip-select memory
regions). The IOSIZ bit (bit 5) in the MPCS register specifies the width of the data bus for
all I/O accesses. Table 3-8 shows how the bit settings affect bus size.
Содержание Am186 CC
Страница 1: ...Am186 CC CH CU Microcontrollers User s Manual Order 21914B...
Страница 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Страница 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Страница 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Страница 39: ...Architectural Overview Am186 CC CH CU Microcontrollers User s Manual 1 15 Figure 1 6 32 Channel Linecard CH CC...
Страница 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Страница 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Страница 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Страница 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Страница 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Страница 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Страница 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...