High-Level Data Link Control (HDLC)
Am186™CC/CH/CU Microcontrollers User’s Manual
15-19
4. Finally, set the SmartDMA TXST and POLL bits to restart the DMA and poll the current
descriptor. If step 3 was executed to back the DMA to the start of the packet, or if the
DMA was already at the start of the packet (e.g., if CTS was lost during transmission of
the first buffer in the packet), then the packet is resent. If step 3 was not executed, and
the current DMA descriptor does not have STP set, then the DMA controller clears the
OWN bit on the descriptor and reads in the next descriptor. The DMA controller repeats
this clearing of the OWN bit and stepping to the next descriptor until it encounters a
descriptor with the OWN bit clear, or a descriptor with the STP bit set.
In other words, if the current descriptor is not the first descriptor of a packet (STP bit
is 0) and step 3 is not executed, the DMA controller automatically starts up again at the
next packet boundary (next buffer with STP set), and it is up to higher-level end-to-end
protocols to notice that the current packet was not transmitted successfully and to
resend it.
15.5.6.2
HDLC Receiver
Under normal operation, when an HDLC packet is received, the SmartDMA interface stores
it in one or more buffers, setting the STP bit in the first buffer descriptor, clearing the status
bits in any middle buffer descriptors, setting the EOP (end-of-packet) and error bits, and
storing the total length in the last (or only) buffer descriptor.
Software must perform two tasks, which in some systems can be performed at the same
time:
■
Software must fill the buffer descriptors with pointers to available buffers and information
about their size, and set the OWN bits to make them available to the SmartDMA interface.
If software is late in performing this task, an RBU interrupt is generated. If software is
so late that data is lost, an HDLC ROFLO interrupt is generated. Software does not need
to enable these interrupts or poll for this status. If software enables these interrupts, it
does not need to take any action in response to the interrupts except to provide buffers
to the descriptor ring (and reset the interrupt status bit in order to enable subsequent
interrupts of the same kind) because the overflow status is reflected in the next packet
stored to the ring.
If software provides buffers in response to an RBU or HDLC ROFLO interrupt, the
software can also set the DMA POLL bit. Setting this bit causes the DMA controller to
notice that the OWN bit of the next buffer is set, sooner than the DMA controller may
have noticed it on its own. There is never any reason to set the POLL bit for the receive
buffer unless the DMA controller run out of empty buffers.
■
Software must examine the descriptors of buffers that have been received. Software
searches through the descriptor ring until it finds the first descriptor that either has the
OWN bit set, or has the EOP bit set, or until it gets to the last descriptor that it has made
available to the hardware. When software finds a descriptor with the OWN bit reset and
the EOP bit set, it knows it has found the end of a packet. Software then moves the
descriptors off the ring, and sends the buffers to a higher-level task. If the error bits are
set in the descriptor with the EOP, software could simply recycle the buffers to the next
free position in the ring, without sending them to the next layer.
Содержание Am186 CC
Страница 1: ...Am186 CC CH CU Microcontrollers User s Manual Order 21914B...
Страница 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Страница 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Страница 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Страница 39: ...Architectural Overview Am186 CC CH CU Microcontrollers User s Manual 1 15 Figure 1 6 32 Channel Linecard CH CC...
Страница 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Страница 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Страница 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Страница 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Страница 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Страница 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Страница 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...