DMA Controller
8-4
Am186™CC/CH/CU Microcontrollers User’s Manual
8.3
SYSTEM DESIGN
Table 8-1 lists the DMA signals that are multiplexed with other microcontroller functions.
Pinstraps are sampled only at external reset and do not affect the pin’s other functions, so
they are not shown in this table. Other multiplexed signals, when enabled, either disable or
alter any other functions that use the same pin.
.
8.4
REGISTERS
The DMA controller is programmed through the use of registers: seven registers for each
general-purpose channel and nine for each pair of SmartDMA channels (see Table 8-2).
In addition, software can use the DMA Halt (DMAHLT) register (an Interrupt Controller
register) to halt DMA activity. Appendix A summarizes the bits in all the registers. For a
complete description of all the peripheral registers, see the
Am186™CC/CH/CU
Microcontrollers Register Set Manual, order #21916.
DMA channel control registers can be changed while the channel is operating. Any changes
made during DMA operations affect the current DMA transfer.
All DMA registers except the GDxCON0 and GDxCON1 registers can be modified or
altered during any DMA activity. Any changes made to these registers are reflected
immediately in DMA operation.
Table 8-1
DMA Multiplexed Signals
Signal Function
Multiplexed
Signal(s)
Default
Signal
DRQ0
DMA requests
PIO9
PIO9
DRQ1
—
DRQ1
Table 8-2
DMA Controller Register Summary
Offset
Register
Mnemonic
Register Name
Description
General-Purpose DMA Channel Registers
100h
GD0CON0
General-Purpose DMA0 Control 0
Set up general-purpose DMA Channel 0.
Software must stop DMA operation before
writing to these registers, or results will be
unpredictable.
102h
GD0CON1
General-Purpose DMA0 Control 1
104h
GD0SRCL
General-Purpose DMA0 Source
Address Low
The 16 bits of this register, combined with four
bits of the high register, produce a 20-bit
source address for general-purpose DMA
Channel 0.
106h
GD0SRCH
General-Purpose DMA0 Source
Address High
Four bits of this register [19–16], combined
with the 16 bits of the low register, produce a
20-bit source address for general-purpose
DMA Channel 0.
108h
GD0DSTL
General-Purpose DMA0 Destination
Address Low
The 16 bits of this register, combined with four
bits of the high register, produce a 20-bit
destination address for general-purpose DMA
Channel 0.
Содержание Am186 CC
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Страница 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
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Страница 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Страница 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Страница 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Страница 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Страница 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Страница 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...