DMA Controller
8-28
Am186™CC/CH/CU Microcontrollers User’s Manual
8.5.7.3
SmartDMA Channel Memory Overview
Figure 8-6 on page 8-29 and Figure 8-7 on page 8-30 illustrate how SmartDMA channels
use memory. Each SmartDMA channel (both transmit and receive) has two registers that
contain the base descriptor ring address and the number of entries in the descriptor ring.
(A
descriptor ring is merely a block of memory that the CPU and software use to control
and describe data buffers.)
There are two descriptor rings for each SmartDMA channel: one for transmit and one for
receive. The SDxTRCAL and SDxRRCAL registers contain the three bits that encode the
number of entries in the ring, and 12 bits (bits 15–4) to determine the 12 low address bits
of the descriptor ring address, which is the start location in memory of the buffer descriptor
ring. The SDxTRAH and SDxRRAH registers contain the four high bits (19–16) of the
addresses. Because the base address of the ring must be paragraph aligned (aligned to a
16-byte physical memory boundary), address bits 3–0 are always zeros. The address is
specified as a 20-bit linear address, not as a segment:offset pair. For example, for the
segment C000h and offset 1000h, the linear address would be: (C000h x 16) + 1000h =
C1000h; therefore, the low register = 1000h and the high register = 0Ch.
The size of the transmit and receive descriptor rings (the ring count) is independently
programmable to 1, 2, 4, 8, 16, 32, 64, or 128 descriptors. Even when the ring size is set
to 1, that entry is still interpreted as a descriptor, not as the memory buffer itself.
Each entry in the descriptor ring is composed of a 20-bit linear address for a buffer, an
owner semaphore bit, a frame-start indicator bit, a frame-end indicator bit, a terminal count
interrupt bit, and a 15-bit buffer byte count. Other fields are also present but are dependent
on whether the descriptor is in a transmit or receive descriptor ring.
The address in each descriptor ring entry contains the address of the data buffer pointed
to by that entry. Note that the HDLC and USB peripheral controllers transmit data packets,
which contain a block of data between a start and end indicator. A packet (e.g., all the HDLC
data between two HDLC flag bytes) can be broken up into multiple buffers, but a buffer
cannot contain data for different packets.
Table 8-11
Am186CH SmartDMA Channel Request Source and Synchronization
SmartDMA
Channel
Direction Source
Destination
Synchronization
0
Transmit
Memory buffer
HDLC A transmit FIFO
Destination
Receive
HDLC A receive FIFO
Memory buffer
Source
1
Transmit
Memory buffer
HDLC B transmit FIFO
Destination
Receive
HDLC B receive FIFO
Memory buffer
Source
Table 8-12
Am186CU SmartDMA Channel Request Source and Synchronization
SmartDMA
Channel
Direction Source
Destination
Synchronization
2
Transmit
Memory buffer
USB endpoint B transmit
FIFO
Destination
Receive
USB endpoint A receive FIFO Memory buffer
Source
3
Transmit
Memory buffer
USB endpoint D transmit
FIFO
Destination
Receive
USB endpoint C receive
FIFO
Memory buffer
Source
CH
CU
Содержание Am186 CC
Страница 1: ...Am186 CC CH CU Microcontrollers User s Manual Order 21914B...
Страница 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Страница 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Страница 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Страница 39: ...Architectural Overview Am186 CC CH CU Microcontrollers User s Manual 1 15 Figure 1 6 32 Channel Linecard CH CC...
Страница 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Страница 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Страница 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Страница 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Страница 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Страница 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Страница 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Страница 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Страница 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Страница 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...