VD300 Series Inverter User Manual
Communication Protocol
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CMD
06H
Write data address high bit
30H
Write data address low bit
01H
Data content high bit
13H
Data content low bit
88H
CRC CHK low bit
DAH
CRC CHK high bit
5CH
END
T1-T2-T3-T4
9.6.3 Communication Format Error Check Method
Frame error check mode includes two part verification, bit check of byte (odd/even verify) and CRC
check of complete data of format.
9.6.3.1 Byte check
User can select different check mode according to requirement, can also select no-check, but it will
affect the bit setting of every byte check.
Even parity check:
add a bit of even parity check before data transmission, to express the number of
“1” in the transmission data is odd or even, if the number is even, check bit is “0”, otherwise it “1”. This
is to Keeping the parity of the data unchanged.
Odd parity check: add a bit of odd parity check before data transmission, to express the number of “1”
in the transmission data is odd or even, if the number is odd, check bit is “0”, otherwise it “1”. This is to
Keeping the parity of the data unchanged.
For example, the transmitting data “11001110”, there is 5 “1” in the data, if using even parity check,
the even check bit is “1”, if using odd parity check, the odd check bit is “0”, when transmitting, the
parity check bit will be processed and put at the position of format check bit. And the receiving device
will also do parity check, if it found the parity of the received data is not the same as pre-set, then it
decides that communication was in error.
9.6.3.2 CRC check method
In RTU frame format, format include format error-checking field that is based on CRC method
calculation. The CRC field checks the contents of the entire format. The CRC field has two bytes ,
containing a 16-bit binary value. The CRC value is calculated by the transmitting device, which adds
the CRC to the format. The receiving device recalculates the received CRC format, and compares the
value of CRC field received, if the two value of CRC is not equal, then there is error in transmission.
The CRC saves 0xFFFF at first, then call a process to deal with the successive 6 bytes of the format
and the value of present register. Only the 8bit data of each byte is enabled for CRC, the starting bit
and the end bit and parity check bit is all disabled.
During generation of the CRC, each eight-bit character is separately do XOR with the register
contents, the results is shifting towards the lowest Enabled bit, the highest Enabled bit is filled with 0.
LSB is extracted to be checked, if LSB is 1, the register will be separately do XOR with pre-set value;
if LSB is 0, then no need. The complete process will be repeated for 8times. After completing of the
last bit (the 8
th
bit), the next 8bit byte will be separately XOR with present register value. The final
value of register is the CRC value of the all bit executed of the frame.
The calculation of CRC, adopting the international standard CRC check regulation, when user is
editing CRC calculation, can refer to related CRC calculation.
Here providing a CRC calculation simple function for user reference.
unsigned int crc_cal_value(unsigned char *data_value, unsigned char data_length)
{
int i;
Summary of Contents for VD300 Series
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