Circuit Description
90
CG635 Synthesized Clock Generator
CG646 and CG647 line receivers
Schematic sheet “CG_LR4B”
The CG646-CG647 line receivers convert differential LVDS clocks to complementary
RF, CML, or NIM outputs on SMA connectors. These two line receivers use the same
PCB and circuit design. The voltage source for the logic “1” level is set for a particular
output logic level, as is the magnitude of the switched current which controls the
amplitude of the logic transition.
The LVDS level clock is received on the 1-2 pair of the RJ-45 connector, J400. The
differential signal is (primarily) terminated by R425 and R426. Undesired common
mode signals are terminated by R424 and C419. The unused RS-485 level clocks are
terminated by R400.
The LVDS clock input is AC coupled to an ECL line receiver, U401. The clocks’ DC
levels are summed with the AC levels by the (slow) differential amplifiers U400A and
U400B. The output of the line receiver is passed to a laser diode driver, U403 a
MAX3737, which provides fast (
§
60 ps), switched, differential, programmable current
sources to drive the SMA outputs.
The MAX3737 has other features which are not used here but which need to be
accommodated so as to avoid apparent “fault” conditions. The transistor Q400 imitates a
laser diode’s photo monitor by providing small current that increases with the
MAX3737’s bias current generator. U404 provides a reset to U403 in the case that a
fault should occur. The magnitude of the current switched by U403 is controlled by
R413.
Both SMA outputs should be terminated with 50
ȍ
loads.
CG648 line receiver
Schematic sheet “CG_LR5B”
The CG648 line receivers convert differential LVDS clocks to complementary negative
ECL outputs on SMA connectors.
The LVDS level clock is received on the 1-2 pair of the RJ-45 connector, J500. The
differential signal is (primarily) terminated by R502 and R503. Undesired common
mode signals are terminated by R504 and C501. The unused RS-485 level clocks are
terminated by R500.
The LVDS clock input is AC coupled to an ECL line receiver, U501. The clocks’ DC
levels are summed with the AC levels by the (slow) differential amplifiers U500A and
U500B. The output of the line receiver is passed to a laser diode driver, U503 a
MAX3737, which provides fast (
§
60 ps), switched, differential, programmable current
sources to drive the SMA outputs.
The MAX3737 has other features which are not used here but which need to be
accommodated so as to avoid apparent “fault” conditions. The transistor Q500 imitates a
laser diode’s photo monitor by providing small current that increases with the
MAX3737’s bias current generator. U504 provides a reset to U503 in the case that a
