Introduction 3
CG635 Synthesized Clock Generator
To operate at specification, BOTH outputs should be terminated into 50
ȍ
, even if only
one output is used.
CMOS
The bottom output driver is a CMOS compatible driver that can operate from DC to
250 MHz. It drives the output at the selected frequency, amplitude and offset. At
frequencies above 250 MHz, the CMOS driver will be turned off and forced to a low
logic state. To operate at specification, the CMOS output driver should be terminated into
a high impedance input and NOT terminated into 50
ȍ
.
Output Levels
Standard Levels
The CG635 provides a simple method for switching among five standard voltage levels
for the Q / Q
¯ and CMOS outputs. The meaning of the five standard levels is summarized
in Table 1 and Table 2 below:
Table 1: Q / Q
¯ Standard Output Levels
Label Description
V
HIGH
(V)
V
LOW
(V)
PECL5V
ECL run on +5 VDC supply
4.00
3.20
PECL3.3V
ECL run on +3.3 VDC supply
2.30
1.50
LVDS
Low voltage differential signaling 1.43
1.07
+7 dBm
1 V
pp
with 0.0 VDC offset
0.50
–0.50
ECL
ECL run on negative supply
–1.00
–1.80
Table 2: CMOS Standard Output Levels
Label Description
V
HIGH
(V)
V
LOW
(V)
+5.0V
5 V CMOS
5.00
0.00
+3.3V
3.3 V CMOS
3.30
0.00
+2.5V
2.5 V CMOS
2.50
0.00
+1.8V
1.8 V CMOS
1.80
0.00
+1.2V
1.2 V CMOS
1.20
0.00
V
HIGH
and V
LOW
indicate the voltage driven by the Q / Q
¯ or CMOS outputs for the high
and low logic levels.
LEDs in the OUTPUT LEVELS section indicate the standard level that is currently being
driven on the output. Pressing the
Ÿ
and
ź
keys in this section will move the standard
output level up and down in the table, respectively.
Variable Levels
A sixth LED, labeled VAR, turns on when the current output levels do not correspond to
any of the standard levels. In this case, the standard level LED indicates the standard
level that is closest to the current level. Pressing the
Ÿ
and
ź
keys when the VAR LED
is on, forces the output to the closest standard output in the direction indicated by the key.
