Performance Evaluation
55
CG635 Synthesized Clock Generator
Frequencies Below 100 MHz
For frequencies below 100 MHz use the setup shown in Figure 8 again. Also use the
same SR620 configuration except make sure the channel A UHF prescaler is not
activated. Set the frequency of the CG635 to each value given in Table 27. Record the
frequency measured by the SR620. Verify that the measured frequency is within the
limits specified in Table 27.
Table 27: Test frequencies below 100 MHz
Set Freq. (MHz) Min Freq. (Hz)
Measured Freq. (Hz)
Max Freq (Hz)
0.1 99,999.999
100,000.001
0.2 199,999.999
200,000.001
0.5 499,999.999
500,000.001
1.0 999,999.999
1,000,000.001
2.0 1,999,999.990
2,000,000.010
5.0 4,999,999.990
5,000,000.010
10.0 9,999,999.990
10,000,000.010
20.0 19,999,999.900
20,000,000.100
50.0 49,999,999.900
50,000,000.100
100.0 99,999,999.900
100,000,000.100
Time Modulation Test
The time modulation test verifies that the time modulation input on the rear panel of the
CG635 is functioning properly. A voltage swing from –5 V to +5 V should modulate the
phase of the output by 10 ns. Use the setup shown in Figure 9 to test the time modulation
input.
Figure 9: Setup for time modulation test.
CG635 Configuration
Use the following procedure to configure the CG635 for the time modulation test:
1.
Press ‘SHIFT’, ‘INIT’, ‘Hz’ to return the CG635 to default settings.
2.
Press the Q/Q
¯
ź
button to 7 dBm output level for the Q/Q
¯ outputs.
Time Modulation Test Procedure
Perform the following steps on the SR620 to test the time modulation input:
Q
Q
CMOS
CG635
SR620
EXT A
B REF
10 MHz IN
50
Ω
terminator
10 MHz OUT
MOD IN
D/A OUT 1
