Performance Evaluation
50
CG635 Synthesized Clock Generator
Table 20: Minimum and Maximum allowed values for the CMOS output
Output
Min. (Low, High) V
Measured (Low, High) V
Max. ( Low, High) V
1.2 V
(–0.044, 1.156)
(0.044, 1.244)
1.8 V
(–0.056, 1.744)
(0.056, 1.856)
2.5 V
(–0.070, 2.430)
(0.070, 2.570)
3.3 V
(–0.086, 3.214)
(0.086, 3.386)
5.0 V
(–0.120, 4.880)
(0.120, 5.120)
Transition Time Measurements
The 20 % to 80 % output transition times of the CG635 are tested using the HP 54120A
Digitizing Oscilloscope with HP 54121A four channel input module. Configure the setup
as in Figure 6.
Figure 6: Transition time measurement setup
Connect 20 dB attenuators to the inputs of the HP 54121A. Use short, equal length SMA
cables with SMA to BNC adaptors to connect the CG635 to the HP 54121A.
Setup the CG635 as follows:
1.
Press ‘SHIFT’, ‘INIT’, ‘Hz’ to return the CG635 to default settings.
2.
Press the Q/Q
¯
ź
button to 7 dBm output level for the Q/Q
¯ outputs
3.
Press the CMOS
Ÿ
button to 5.0 V output levels for the CMOS output
4.
Press ‘FREQ’, ‘2’, ‘0’, ‘0’, ‘MHz’ to set the frequency to 200 MHz.
The same CG635 configuration is used for both the Q/Q
¯ output timing measurements and
the CMOS output timing measurements.
Q/Q
¯ Timing Measurements
For Q/Q
¯ timing measurements, configure the HP 54120A digitizing scope as in Table 21.
Q
Q
CMOS
CG635
HP 54121A
HP 54120A
1
2 3 4 Trig
CG646
20 dB Attenuator
DC to 18 GHz
Ω
