Omron CX-PROGRAMMER V9, Operation Manual

Page: 505 / 536

PART 3: CX-Server Runtime
OMRON APPENDIX B – PLC Memory Areas
Revision 2.0 CX-Server Runtime_Page 67
C500 Device Group
Prefix
Start
Channel
End Channel
Word
Addressing
Bit
Addressing
Read
Write
Modifiers
TC 0 127 Present Value Status Yes F C
DM 0 511 Yes No Yes
HR 0 31 Yes Yes Yes F C
IR (opt) 0 57 Yes Yes Yes F C
LR 0 31 Yes Yes Yes F C
SR (opt) 58 60 Yes Yes Yes F C
SR (opt) 61 63 (bit 7) Yes Yes No
TR 0 0 (bit 7) No Yes No
CJ2H/CJ2M Device Group
General Memory Areas
General Memory Areas for all CJ2H (CPU64, 65, 66, 67 and 68) and CJ2M (CPU35, 34, 33, 32, 31, 15, 14, 13,
12 and 11) CPU Units.
Prefix Start
Channel
End Channel Word
Addressing
Bit
Addressing
Read
Write
CIO*1 0 6143 Yes Yes Yes
DR 0 15 Yes No Yes
TK 0 127 Status Yes No
A 0 447 Yes Yes No
A 10000 11535 Yes Yes No
A 448 1471 Yes Yes Yes
H 0 511 Yes Yes Yes
W 0 511 Yes Yes Yes
T 0 4095 Present Value Status Yes
C 0 4095 Present Value Status Yes
D 0 32767 Yes Yes Yes
IR 0 15 Yes (double) No Yes
CF 0 11 No Yes No
CF 100 104 No Yes No
CF 113 114 No Yes No
*1 Refer to the CJ2 CPU Unit Software Manual (Cat. No. W473) for details on the CIO Area.
CJ2H-CPU64(-EIP) and CPU65(-EIP) Memory Areas
Memory Areas in addition to General Memory Areas.
Prefix Start
Channel
End Channel Word
Addressing
Bit
Addressing
Read
Write
E 0 32767*4 Yes Yes Yes
Note: Bits in EM bank 3 can be force-set and force-reset (Enable Forced Set/Forced Clear).
CJ2H-CPU66(-EIP) Memory Areas
Memory Areas in addition to General Memory Areas.
Prefix Start
Channel
End Channel Word
Addressing
Bit
Addressing
Read
Write
E 0 32767*10 Yes Yes Yes
Note: Bits in EM banks 6 to 9 can be force-set and force-reset (Enable Forced Set/Forced Clear).