392
Failure Diagnosis Functions
Section 6-8
Operation of FAL(006)
When execution condition A goes ON, an error with FAL number 002 is gener-
ated, A402.15 (FAL Error Flag) is turned ON, and A360.02 (FAL Number 002
Flag) is turned ON. Program execution continues.
Errors generated by FAL(006) can be cleared by executing FAL(006) with FAL
number 00 or performing the error read/clear operation from the CX-Program-
mer.
Operation of FALS(007)
When execution condition B goes ON, an error with FALS number 003 is gen-
erated, and A401.06 (FALS Error Flag) is turned ON. Program execution is
stopped.
Errors generated by FAL(006) can be cleared by eliminating the cause of the
error and performing the error read/clear operation from the CX-Programmer.
6-8-2
Failure Point Detection: FPD(269)
FPD(269) performs time monitoring and logic diagnosis. The time monitoring
function generates a non-fatal error if the diagnostic output isn’t turned ON
within the specified monitoring time. The logic diagnosis function indicates
which input is preventing the diagnostic output from being turned ON.
Time Monitoring
Function
FPD(269) starts timing when it is executed and turns ON the Carry Flag if the
diagnostic output isn’t turned ON within the specified monitoring time. The
Carry Flag can be programmed as the execution condition for an error pro-
cessing block. Also, FPD(269) can be programmed to generate a non-fatal
FAL error with the desired FAL number.
When an FAL error is generated, a preset message will be registered and can
be displayed on the CX-Programmer. FPD(269) can be set to output the
results of logic diagnosis (the address of the bit preventing the diagnostic out-
put from being turned ON) just before the message.
The teaching function can be used to automatically determine the actual time
required for the diagnostic output to go ON and set the monitoring time.
Logic Diagnosis
Function
FPD(269) determines which input bit is causing the diagnostic output to
remain OFF and outputs the result. The output can be set to bit address out-
put (PLC memory address) or message output (ASCII).
If bit address output is selected, the PLC memory address of the bit can be
transferred to an Index Register and the Index Register can be indirectly
addressed in later processing.
A
FAL
002
#0000
B
FALS
003
#0000
Summary of Contents for CP1L-L14D Series
Page 2: ...CP1L L14D CP1L L20D CP1L M30D CP1L M40D CP1L CPU Unit Operation Manual Revised June 2007...
Page 3: ...iv...
Page 9: ...x...
Page 13: ...xiv TABLE OF CONTENTS...
Page 21: ...xxii...
Page 33: ...xxxiv Conformance to EC Directives 6...
Page 65: ...32 Function Blocks Section 1 5...
Page 153: ...120 CP CPM1A series Expansion I O Unit Wiring Section 3 6...
Page 523: ...490 Troubleshooting Unit Errors Section 9 4...
Page 531: ...498 Replacing User serviceable Parts Section 10 2...
Page 563: ...530 Auxiliary Area Allocations by Function Appendix C...
Page 611: ...578 Auxiliary Area Allocations by Address Appendix D...
Page 638: ...605 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 639: ...606 Connections to Serial Communications Option Boards Appendix F...
Page 669: ...636 Index...
Page 671: ...638 Revision History...