NEC V850E/PH2, User Manual

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Chapter 2 Pin Functions
User’s Manual U16580EE3V1UD00
(1) Noise removal time control register (NRC)
The NRC register specifies the noise removal clock setting for different edge sensitive inputs.
This register can be read or written in 8-bit or 1-bit units.
Reset input clears this register to 00H.
Figure 2-2: Noise Removal Time Control Register (1/2)
Note: Input pins TIC00, TIC01, TCRL0, TCUD0, and TIUD0 are not available on
μ
PD70F3447
After reset: 00H R/W Address: FFFFF7A0H
7 6 5 4 3 2 1 0
NRC NCR7 NCR6 NCR5 NCR4 NCR3 NCR2 NCR1 NCR0
NCR7 Noise removal clock setting for input pins TIR10 to TIR13, TEVTR1, TTRGR1
0 f
XX
/16
1 f
XX
/64
NCR6 Noise removal clock setting for input pins TIP60, TIP61, TIP70, TIP71,
TEVTP6, TEVTP7, TTRGP6, TTRGP7
0 f
XX
/16
1 f
XX
/64
NCR5 Noise removal clock setting for input pins TIP40, TIP41, TIP50, TIP51,
TEVTP4, TEVTP5, TTRGP4, TTRGP5
0 f
XX
/16
1 f
XX
/64
NCR4 Noise removal clock setting for input pins TIP20, TIP21, TIP30, TIP31,
TEVTP2, TEVTP3, TTRGP2, TTRGP3
0 f
XX
/16
1 f
XX
/64
NCR3 Noise removal clock setting for input pins TIP00, TIP01, TIP10, TIP11,
TEVTP0, TEVTP1, TTRGP0, TTRGP1
0 f
XX
/16
1 f
XX
/64
NCR2 Noise removal clock setting for input pins INTP12, TICC00, TICC01, TCLR0,
TCUD0, TIUD0, TIT00, TIT01, TIT10, TIT11, TECRT0, TECRT1, TEVTT0,
TEVTT1, TTRGT0, TTRGT1, TENCT00, TENCT01, TENCT10, TENCT11
Note
0 f
XX
/16
1 f
XX
/64